參數(shù)資料
型號: CAT1024ZD4I-30
英文描述: Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset
中文描述: 監(jiān)控電路,帶有I2C串行的2K位CMOS EEPROM和手動復位
文件頁數(shù): 12/20頁
文件大?。?/td> 267K
代理商: CAT1024ZD4I-30
CAT1024, CAT1025
Doc. No. 3008 Rev. N
12
2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Acknowledge Polling
Disabling of the inputs can be used to take
advantage of the typical write cycle time. Once the
stop condition is issued to indicate the end of the
host’s write opration, the CAT1024/25 initiates the
internal write cycle. ACK polling can be initiated
immediately. This involves issuing the start condition
followed by the slave address for a write operation. If
the device is still busy with the write operation, no
ACK will be returned. If a write operation has
completed, an ACK will be returned and the host can
then proceed with the next read or write operation.
WRITE PROTECTION PIN (WP)
The Write Protection feature (CAT1025 only) allows
the user to protect against inadvertent memory array
programming. If the WP pin is tied to V
CC
, the entire
memory array is protected and becomes read only.
The CAT1025 will accept both slave and byte addre-
sses, but the memory location accessed is protected
from programming by the device’s failure to send an
acknowledge after the first byte of data is received.
READ OPERATIONS
The READ operation for the CAT1024/25 is initiated in the
same manner as the write operation with one exception,
the Rˉˉ bit is set to one. Three different READ operations
are possible: Immediate/Current Address READ,
Selective/Random READ and Sequential READ.
Figure 10. Immediate Address Read Timing
SCL
SDA
8TH BIT
STOP
NO ACK
DATA OUT
8
9
SLAVE
ADDRESS
S
A
C
K
DATA
N
O
A
C
K
S
T
O
P
P
BUS ACTIVITY:
MASTER
SDA LINE
S
T
A
R
T
相關PDF資料
PDF描述
CAT1024ZD4I-30-GT2 Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset
CAT1024ZD4I-30-GT3 Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset
CAT1024ZD4I-30T2 Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset
CAT1024ZD4I-30T3 Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset
CAT1024ZD4I-42 Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset
相關代理商/技術參數(shù)
參數(shù)描述
CAT1024ZD4I-30-GT2 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset
CAT1024ZD4I-30-GT3 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset
CAT1024ZD4I-30T2 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset
CAT1024ZD4I-30-T2 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset
CAT1024ZD4I-30T3 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset