參數(shù)資料
型號: CAP1028-1-BP-TR
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 模擬信號調理
英文描述: SPECIALTY ANALOG CIRCUIT, QCC20
封裝: 4 X 4 MM, ROHS COMPLAINT, QFN-20
文件頁數(shù): 8/69頁
文件大?。?/td> 948K
代理商: CAP1028-1-BP-TR
8 Channel Capacitive Touch Sensor with 2 LED Drivers
Datasheet
Revision 1.0 (06-16-09)
16
SMSC CAP1028
DATASHEET
3.2.6
SMBus Timeout
The CAP1028 includes an SMBus timeout feature. Following a 30ms period of inactivity on the SMBus
where the SMCLK pin is held low, the device will timeout and reset the SMBus interface.
The timeout function defaults to disabled. It can be enabled by setting the TIMEOUT bit in the
Configuration register (see Section 5.6).
3.2.7
SMBus and I2C Compliance
The major difference between SMBus and I2C devices is highlighted here. For complete compliance
information refer to the SMBus 2.0 specification.
1. Minimum frequency for SMBus communications is 10kHz.
2. The client protocol will reset if the clock is held low longer than 30ms.
3. The client protocol will reset if both the clock and the data line are high for longer than 150us (idle
condition).
4. I2C devices do not support the Alert Response Address functionality (which is optional for SMBus).
5. I2C devices support block read and write differently. I2C protocol allows for unlimited number of
bytes to be sent in either direction. The SMBus protocol requires that an additional data byte
indicating number of bytes to read / write is transmitted. The CAP1028 supports I2C formatting only.
3.3
SMBus Protocols
The CAP1028 is SMBus 2.0 compatible and supports Send Byte, Read Byte, Block Read, Receive
Byte as valid protocols as shown below. The CAP1028 also supports the I2C block read and block
write protocols. Finally, it will respond to the Alert Response Address protocol but is not in full
compliance.
All of the below protocols use the convention in Table 3.2.
3.3.1
SMBus Write Byte
The Write Byte is used to write one byte of data to a specific register as shown in Table 3.3.
3.3.2
Block Write
The Block Write is used to write multiple data bytes to a group of contiguous registers as shown in
Table 3.4. It is an extension of the Write Byte Protocol.
Table 3.2 Protocol Format
DATA SENT
TO DEVICE
DATA SENT TO
THE HOST
Data sent
Table 3.3 Write Byte Protocol
START
SLAVE
ADDRESS
WR
ACK
REGISTER
ADDRESS
ACK
REGISTER
DATA
ACK
STOP
1 ->0
YYYY_YYY
0
XXh
0
XXh
0
0 -> 1
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