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參數(shù)資料
| 型號： | CA3338MZ96 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONV D/A 8BIT 50MHZ 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 設(shè)置時間： | 20ns |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 50M |
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Harris Corporation 1997. Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
CMOS Video Speed, 8-Bit, 50 MSPS, R2R
D/A Converters
The CA3338 family are CMOS/SOS high speed R2R voltage
output digital-to-analog converters. They can operate from a
single +5V supply, at video speeds, and can produce
“rail-to-rail” output swings. Internal level shifters and a pin for
an optional second supply provide for an output range below
digital ground. The data complement control allows the
inversion of input data while the latch enable control provides
either feedthrough or latched operation. Both ends of the
R2R ladder network are available externally and may be
modulated for gain or offset adjustments. In addition, “glitch”
energy has been kept very low by segmenting and
thermometer encoding of the upper 3 bits.
The CA3338 is manufactured on a sapphire substrate to give
low dynamic power dissipation, low output capacitance, and
inherent latch-up resistance.
Ordering Information
Features
CMOS/SOS Low Power
R2R Output, Segmented for Low “Glitch”
CMOS/TTL Compatible Inputs
Fast Settling: (Typ) to 1/2 LSB . . . . . . . . . . . . . . . . . . 20ns
Feedthrough Latch for Clocked or Unclocked Use
Accuracy (Typ) . . . . . . . . . . . . . . . . . . . . . . . . . .
±0.5 LSB
Data Complement Control
High Update Rate (Typ) . . . . . . . . . . . . . . . . . . . . . 50MHz
Unipolar or Bipolar Operation
Pb-free Available
Applications
TV/Video Display
High Speed Oscilloscope Display
Digital Waveform Generator
Direct Digital Synthesis
Pinout
CA3338, CA3338A
(PDIP, SOIC)
TOP VIEW
PART
NUMBER
LINEARITY
(INL, DNL)
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
CA3338E
±1.0 LSB
-40 to 85
16 Ld PDIP E16.3
CA3338EZ
(Note)
±1.0 LSB
-40 to 85
16 Ld PDIP
(Pb-free)
E16.3
CA3338AE
±0.75 LSB
-40 to 85
16 Ld PDIP E16.3
CA3338AEZ
(Note)
±0.75 LSB
-40 to 85
16 Ld PDIP
(Pb-free)
E16.3
CA3338M
±1.0 LSB
-40 to 85
16 Ld SOIC M16.3
CA3338MZ
(Note)
±1.0 LSB
-40 to 85
16 Ld SOIC
(Pb-free)
M16.3
CA3338AM
±0.75 LSB
-40 to 85
16 Ld SOIC M16.3
CA3338AMZ
(Note)
±0.75 LSB
-40 to 85
16 Ld SOIC
(Pb-free)
M16.3
Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which is compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J Std-020B.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
D7
D6
D5
D4
D3
D2
VSS
D1
VDD
COMP
VREF+
VOUT
VREF-
VEE
D0
LE
FN1850.4
CA3338, CA3338A
Data Sheet
July 2004
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