ramp or during a brownout condition even when VDD is below " />
參數(shù)資料
型號(hào): C8051F534A-IT
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 12/220頁(yè)
文件大?。?/td> 0K
描述: IC 8051 MCU 4K FLASH 20TSSOP
產(chǎn)品培訓(xùn)模塊: Serial Communication Overview
標(biāo)準(zhǔn)包裝: 74
系列: C8051F53x
核心處理器: 8051
芯體尺寸: 8-位
速度: 25MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 16
程序存儲(chǔ)器容量: 4KB(4K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 622 (CN2011-ZH PDF)
配用: 336-1488-ND - KIT DEV C8051F53XA, C8051F52XA
336-1457-ND - ADAPTER PROG TOOLSTICK F530TPP
336-1456-ND - ADAPTER PROG TOOLSTICK F530MPP
其它名稱: 336-1500-5
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)當(dāng)前第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)第220頁(yè)
Rev. 1.4
109
C8051F52x/F53x
ramp or during a brownout condition even when VDD is below the specified minimum of 2.0 V. There are
two possible ways to handle this transitional period as described below:
If using the on-chip regulator (REG0) at the 2.6 V setting (default), it is recommended that user software
set the VDDMON0 threshold to its high setting (VRST-HIGH) as soon as possible after reset by setting the
VDMLVL bit to 1 in SFR Definition 11.1 (VDDMON). In this typical configuration, no external hardware or
additional software routines are necessary to monitor the VDD level.
Note:
notes related to the VDD Monitor high threshold setting in older silicon revisions A and B.
If using the on-chip regulator (REG0) at the 2.1 V setting or if directly driving VDD with REG0 disabled, the
user system (software/hardware) should monitor VDD at power-on and also during device operation. The
two key parameters that can be affected when VDD < 2.0 V are: internal oscillator frequency (Table 2.11 on
page 34) and minimum ADC tracking time (Table 2.3 on page 28).
SFR Definition 11.1. VDDMON: VDD Monitor Control
Bit7:
VDMEN: VDD Monitor Enable (VDDMON0).
This bit turns the VDD monitor circuit on/off. The VDD Monitor cannot generate system
resets until it is also selected as a reset source in register RSTSRC (SFR Definition 11.2).
The VDD Monitor can be allowed to stabilize before it is selected as a reset source. Select-
ing the VDD monitor as a reset source before it has stabilized may generate a system
reset. See Table 2.8 on page 32 for the minimum VDD Monitor turn-on time.
0: VDD Monitor Disabled.
1: VDD Monitor Enabled (default).
Bit6:
VDDSTAT: VDD Status.
This bit indicates the current power supply status (VDD Monitor output).
0: VDD is at or below the VDD Monitor (VDDMON0) Threshold.
1: VDD is above the VDD Monitor (VDDMON0) Threshold.
Bit5:
VDMLVL: VDD Level Select.
0: VDD Monitor (VDDMON0) Threshold is set to VRST-LOW (default).
1: VDD Monitor (VDDMON0) Threshold is set to VRST-HIGH. This setting is required for any
system that includes code that writes to and/or erases Flash.
Bit4:
VDM1EN*: Level-sensitive VDD Monitor Enable (VDDMON1).
This bit turns the VDD monitor circuit on/off. If turned on, it is also selected as a reset
source, and can generate a system reset.
0: Level-sensitive VDD Monitor Disabled.
1: Level-sensitive VDD Monitor Enabled (default).
Bits3–0: RESERVED. Read = Variable. Write = don’t care.
*Note:
Available only on the C8051F52x-C/F53x-C devices
R/W
R
R/W
R
Reset Value
VDMEN
VDDSTAT VDMLVL
VDM1EN Reserved Reserved Reserved Reserved 1v010000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0xFF
相關(guān)PDF資料
PDF描述
P89LPC915FDH,129 IC 80C51 MCU FLASH 2K 14-TSSOP
C8051F303-GM IC 8051 MCU 8K FLASH 11QFN
AT32UC3C2512C-Z2ZT IC MCU 32BIT 512KB FLASH 64QFN
AU-Y1005-R CONN USB RTANG FMALE TYPE A PCB
USB-B1HSB6 CONN USB TYPE B R/A BLACK
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
C8051F534A-ITR 功能描述:8位微控制器 -MCU 25 MIPS 4 kB 256 SPI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051F534-C-IM 制造商:Silicon Laboratories Inc 功能描述:25 MIPS, 4 KB, 256, SPI, UART, QFN20 - Rail/Tube 制造商:Silicon Laboratories Inc 功能描述:IC MCU 8051 4KB FLASH 20QFN
C8051F534-C-IMR 制造商:Silicon Laboratories Inc 功能描述:25 MIPS, 4 KB, 256, SPI, UART, QFN20 - Tape and Reel 制造商:Silicon Laboratories Inc 功能描述:IC MCU 8051 4KB FLASH 20QFN
C8051F534-C-IT 制造商:Silicon Laboratories Inc 功能描述:25 MIPS, 4 KB, 256, SPI, UART, TSSOP20 - Rail/Tube 制造商:Silicon Laboratories Inc 功能描述:IC MCU 8051 4KB FLASH 20TSSOP
C8051F534-C-ITR 制造商:Silicon Laboratories Inc 功能描述:25 MIPS, 4 KB, 256, SPI, UART, TSSOP20 - Tape and Reel 制造商:Silicon Laboratories Inc 功能描述:IC MCU 8051 4KB FLASH 20TSSOP