C8051F52x/F53x
28
Rev. 1.4
Table 2.3. ADC0 Electrical Characteristics
VDD = 2.1 V, VREF = 1.5 V (REFSL=0), –40 to +125 °C unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
DC Accuracy
Resolution
12
bits
Integral Nonlinearity
—
±3
LSB
Differential Nonlinearity
Guaranteed Monotonic
—
±1
LSB
Offset Error1
–10
±1
+10
LSB
Full Scale Error
–20
±1
+20
LSB
Dynamic Performance (10 kHz sine-wave Single-ended input, 0 to 1 dB below Full Scale, 200 ksps)
Signal-to-Noise Plus Distortion
60
66
—
dB
Total Harmonic Distortion
Up to the 5th harmonic
—
74
—
dB
Spurious-Free Dynamic Range
—
88
—
dB
Conversion Rate
SAR Conversion Clock
—
3
MHz
Burst Mode Oscillator
—
27
MHz
Conversion Time in SAR Clocks2
—
13
—
clocks
Track/Hold Acquisition Time3,6
1—
—
s
Throughput Rate4
—
200
ksps
Analog Inputs
ADC Input Voltage Range5
gain = 1.0 (default)
gain = n
0
—
VREF
VREF / n
V
Absolute Pin Voltage wrt to GND
0
—
VREGIN
V
Sampling Capacitance
—
24
—
pF
Input Multiplexer Impedance
—
1.5
—
k
Power Specifications
Power Supply Current (from VDD)
Operating Mode, 200 ksps
—
1050
1400
A
Burst Mode (Idle)
—
930
—
A
Power-on Time
—
5
—
s
Power Supply Rejection
—
1
—
mV/V
Notes:
1. Represents one standard deviation from the mean. Offset and full-scale error can be removed through
calibration.
2. An additional 2 FCLK cycles are required to start and complete a conversion.
3. Additional tracking time may be required depending on the output impedance connected to the ADC input.
4. An increase in tracking time will decrease the ADC throughput.