參數(shù)資料
型號(hào)： C8051F000
廠商： Silicon Laboratories Inc
文件頁數(shù)： 28/171頁
文件大?。?/td> 0K
描述： IC 8051 MCU 32K FLASH 64TQFP
標(biāo)準(zhǔn)包裝： 160
系列： C8051F00x
核心處理器： 8051
芯體尺寸： 8-位
速度： 20MHz
連通性： SMBus（2 線/I²C），SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 256 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b，D/A 2x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-TQFP
包裝： 托盤
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
17. SERIAL PERIPHERAL INTERFACE BUS
The Serial Peripheral Interface (SPI) provides access to a four-wire, full-duplex, serial bus. SPI supports the
connection of multiple slave devices to a master device on the same bus. A separate slave-select signal (NSS) is
used to select a slave device and enable a data transfer between the master and the selected slave. Multiple masters
on the same bus are also supported. Collision detection is provided when two or more masters attempt a data
transfer at the same time. The SPI can operate as either a master or a slave. When the SPI is configured as a
master, the maximum data transfer rate (bits/sec) is one-half the system clock frequency.
When the SPI is configured as a slave, the maximum data transfer rate (bits/sec) for full-duplex operation is 1/10 the
system clock frequency, provided that the master issues SCK, NSS, and the serial input data synchronously with the
system clock. If the master issues SCK, NSS, and the serial input data asynchronously, the maximum data transfer
rate (bits/sec) must be less that 1/10 the system clock frequency. In the special case where the master only wants to
transmit data to the slave and does not need to receive data from the slave (i.e. half-duplex operation), the SPI slave
can receive data at a maximum data transfer rate (bits/sec) of the system clock frequency. This is provided that
the master issues SCK, NSS, and the serial input data synchronously with the system clock.
Figure 17.1. SPI Block Diagram
SFR Bus
Clock Divide
Logic
Data Path
Control
SFR Bus
Write to
SPI0DAT
Receive Data Register
SPI0DAT
0
1
2
3
4
5
6
7
Shift Register
SPI CONTROL LOGIC
Bit Count
Logic
SPI0CKR
S
C
R
7
S
C
R
6
S
C
R
5
S
C
R
4
S
C
R
3
S
C
R
2
S
C
R
1
S
C
R
0
SPI0CFG
C
K
P
H
A
C
K
P
O
L
B
C
2
B
C
1
B
C
0
F
R
S
2
F
R
S
1
F
R
S
0
SPI0CN
M
O
D
F
T
X
B
S
Y
S
L
V
S
E
L
M
S
T
E
N
S
P
I
E
N
W
C
O
L
S
P
I
F
R
X
O
V
R
N
Pin Control
Interface
SPI Clock
(Master Mode)
Pin
Control
Logic
C
R
O
S
B
A
R
Port I/O
Read
SPI0DAT
SPI IRQ
SYSCLK
Tx Data
Rx Data
SCK
MOSI
MISO
NSS
123
Rev. 1.7
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C8051F000-GQR 功能描述:8位微控制器 -MCU 32KB 12ADC 64Pin MCU Tape and Reel RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051F000R 功能描述:8位微控制器 -MCU C 12Bit 64Pin RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051F000TB 功能描述:開發(fā)板和工具包 - 8051 USE 634-C8051F005TB RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
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