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參數(shù)資料
| 型號(hào)： | C508 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-Bit CMOS Microcontroller |
| 中文描述： | 8位CMOS微控制器 |
| 文件頁(yè)數(shù)： | 46/93頁(yè) |
| 文件大小： | 1204K |
| 代理商： | C508 |
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C508
Data Sheet
42
2000-08
10-Bit A/D Converter
The C508 provides an A/D converter with the following features:
8 input channels (Port 4) which can also be used as digital inputs
10-bit resolution
Single or continuous conversion mode
Interrupt request generation after each conversion
Using successive approximation conversion technique via a capacitor array
Built-in hidden calibration of offset and linearity errors
A/D Converter Clock Selection
The ADC uses two clock signals for operation: the conversion clock
f
ADC
(= 1/
t
ADC
) and
the input clock
f
IN
(= 1/
t
IN
).
f
ADC
is derived from the C508 system clock 2
×
f
OSC
which
is twice the crystal frequency applied at the XTAL pins via the ADC clock prescaler as
shown in
Figure 19
. The input clock
f
IN
is equal to 2
×
f
OSC.
The conversion clock
f
ADC
is limited to a maximum frequency of 2 MHz. Therefore, the ADC clock prescaler must
be programmed to a value which assures that the conversion clock does not exceed 2
MHz. The prescaler ratio is selected by the bits ADCL1 and ADCL0 of SFR ADCON1.
.
Figure 19
A/D Converter Clock Selection
MUX
÷ 4
÷ 8
÷ 16
÷ 32
Conversion Clock
f
ADC
A/D
Converter
2
f
OSC
ADCL0
ADCL1
f
ADC max
= 2 MHz
Condition:
f
IN
= 2
f
OSC
= 4 TCL
1)
f
[MHz]
MCB04102
Oscillator Clock
Rate (
f
OSC
)
f
[MHz]
Prescaller
Ratio
5 MHz
8 MHz
10 MHz
10
ADCL1
ADCL0
16
20
÷ 8
÷ 8
÷ 16
1.25
2
1.25
0
0
1
1
1
0
Input Clock
f
IN
1)
Note: Please refer to AC characteristics in this document for the definition of TCL.
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|---|---|
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