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AP242401 04.99
Ceramic Resonator Oscillators of the
C500 / C166 Microcontroller Family
8
Oscillator Circuitry Layout Recommendations
The layout of the oscillator circuit is important for the RF and EMC behavior of the design. The use
of this recommendation can help to reduce problems caused by the layout. This design
recommendation is optimized on EMC and GND noise aspects.
For an optimal layout the following items have to be noted:
8.1
Avoid Capacitive Coupling
The crosstalk between oscillator signals and others has to be minimized. Sensitive inputs have to
be separated from outputs with a high amplitude.
Note: The crosstalk between different layers also has to be analyzed.
8.2
Avoid Parallel Tracks of High Frequency Signals
In order to reduce the crosstalk caused by capacitive or inductive coupling, tracks of high frequency
signals should not be routed in parallel (also not on different layers!).
8.3
Ground Supply
The ground supply must be realized on the base of a low impedance. The impedance can be made
smaller by using thick and wide ground tracks. Ground loops have to be avoided, because they are
working like antennas.
8.4
Noise Reduction on Ground of the Load Capacitors
Noise on the ground track between the load capacitors and the on-chip oscillator ground can have
an influence on the duty cycle. This is important for systems running in direct drive mode (oscillator
frequency is equal to CPU frequency). Therefore the ground connection of the decoupling
capacitance C
B
(between
V
DD
and
V
SS
of the on-chip oscillator-Inverter) should be between
V
SS
and
system ground connection, to suppress noise from system ground.
8.5
Correct Module Placement
Other RF modules should not be placed near the oscillator circuitry in order to prevent them from
influencing the ceramic resonator functionality.