參數(shù)資料
型號(hào)： BX80524P500128
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 500 MHz, MICROPROCESSOR, PPGA370
封裝： 1.950 X 1.950 INCH, HEAT SINK, STAGGERED, PLASTIC, PGA-370
文件頁數(shù)： 90/130頁
文件大?。?/td> 2654K
代理商： BX80524P500128
62
Datasheet
Intel Celeron Processor up to 1.10 GHz
3.4.6
Determining if a System meets the Overshoot/Undershoot
Specifications (FC-PGA/FC-PGA2 Packages)
The overshoot/undershoot specifications listed in the following tables specify the allowable
overshoot/undershoot for a single overshoot/undershoot event. However most systems will have
multiple overshoot and/or undershoot events that each have their own set of parameters (duration,
AF and magnitude). While each overshoot on its own may meet the overshoot specification, when
the total impact of all overshoot events is accounted for, the system may fail. A guideline to ensure
a system passes the overshoot and undershoot specifications is shown below. It is important to meet
these guidelines; otherwise, contact your Intel field representative.
1. Insure no signal (CMOS or AGTL+) ever exceed the 1.635 V; OR
2. If only one overshoot/undershoot event magnitude occurs, ensure it meets the over/undershoot
specifications in the following tables; OR
3. If multiple overshoots and/or multiple undershoots occur, measure the worst case pulse
duration for each magnitude and compare the results against the AF = 1 specifications. If all of
these worst case overshoot or undershoot events meet the specifications
(measured time < specifications) in the table (where AF=1), then the system passes.
The following notes apply to Table 38 and Table 39.
NOTES:
1. Overshoot/Undershoot Magnitude = 2.18 V is an Absolute value and should never be exceeded
2. Overshoot is measured relative to VSS
3. Undershoot is measured relative to VTT
4. Overshoot/Undershoot Pulse Duration is measured relative to 1.635 V.
5. Ringbacks below VTT can not be subtracted from Overshoots/Undershoots.
6. Lesser Undershoot does not allocate longer or larger Overshoot.
7. Consult the appropriate layout guidelines provided in the specific platform design guide.
8. All values specified by design characterization.
NOTES:
1. BCLK period is 30.0 ns.
2. Measurements taken at the processor socket pins on the solder-side of the motherboard.
Table 38. 66 MHz AGTL+ Signal Group Overshoot/Undershoot Tolerance at Processor Pins
(FC-PGA/FC-PGA2 Packages)
Overshoot/
Undershoot
Magnitude
Maximum Pulse Duration at Tj = 80 °C
(ns)
Maximum Pulse Duration at Tj = 90 °C
(ns)
AF = 0.01
AF = 0.1
AF = 1
AF = 0.01
AF = 0.1
AF = 1
2.18 V
30
3.8
0.38
18
1.8
0.18
2.13 V
30
7.4
0.74
30
3.2
0.32
2.08 V
30
13.6
1.36
30
6.4
0.64
2.03 V
30
25
2.5
30
12
1.1
1.98 V
30
4.56
30
22
2
1.93 V
30
8.2
30
3.8
1.88 V
3030153030
6.8
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