參數(shù)資料
型號: BW1217X
英文描述: 16-bit bus buffer with 3-state outputs (non inverted)
中文描述: BW1217X 10位30MSPS模數(shù)轉(zhuǎn)換器BW1217X |數(shù)據(jù)資料
文件頁數(shù): 9/11頁
文件大?。?/td> 140K
代理商: BW1217X
BW1217X
10BIT 30MSPS ADC
SEC ASIC
ANALOG
PACKAGE
PIN
DESCRIPTION
NAME
PIN NO.
I/O TYPE
PIN DESCRIPTION
REFTOP
2
AI
External Reference Top Bias.(2.0V)
REFBOT
3
AI
External Reference Bottom Bias.(1.0V)
CML
5
AB
Internal Bias Point ( Test Pin )
VDDA
6,7
AP
3.3V Analog Power
VBBA
8
AG
Analog Sub Bias
VSSA
9,10
AG
Analog Ground
AINT
11
AI
Analog Input (+)
Input Range : 0.5~2.5V
AINC
13
AI
Analog Input. (-)
DC 1.5V
REFMID
14
AB
Reference Mid Point ( Test Pin )
ITEST
16
AB
open=use internal bias point
STBY
17
DI
High = power saving standby mode
(normally gnd)
VDDR
18
PP
Ouput Driver Power(3.3V)
VSSR
19
PG
Output Driver Ground
CKIN
20
DI
Sampling Clock Input
TRISTATE
25
DI
high = high impedance digital output
(normally gnd)
DO[9:0]
27~36
DO
Digital Output
UDF
37
DO
Underflow
OVF
38
DO
Overflow
VBBD
44
DG
Digital Substrate Bias
VSSD
45,46
DG
Digital Ground
VDDD
47,48
DP
Digital Power(3.3V)
NOTES
1. I/O TYPE PP and PG denote PAD Power and PAD Ground respectively.
9 / 11
相關(guān)PDF資料
PDF描述
BW1218L Low voltage CMOS 16-bit bus buffer (3-state inverter) with 3.6 V tolerant inputs and outputs
BW1219A Low voltage CMOS 16-bit bus buffer (3-state inverter) with 3.6 V tolerant inputs and outputs
BW1219B Low voltage CMOS 16-bit bus buffer (3-state inverter) with 3.6 V tolerant inputs and outputs
BW1223X Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6 V tolerant inputs and outputs
BW1224L Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6 V tolerant inputs and outputs
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