參數(shù)資料
型號: BUK114-50S
廠商: NXP SEMICONDUCTORS
元件分類: 外設及接口
英文描述: Logic level TOPFET SMD version of BUK104-50L/S
中文描述: BUF OR INV BASED PRPHL DRVR
文件頁數(shù): 9/13頁
文件大小: 144K
代理商: BUK114-50S
Philips Semiconductors
Product specification
Logic level TOPFET
SMD version of BUK104-50L/S
BUK114-50L/S
Fig.16. Maximum drain source supply voltage for
SC load protection. V
DDP(P)
= f(V
IS
); T
mb
150 C
Fig.17. Minimum protection supply voltage
for SC load protection. V
PSP
= f(V
IS
); T
mb
25 C
Fig.18. Typical overload protection characteristics.
t
d sc
= f(P
DS
); conditions: V
PS
V
PSP
; V
IS
5 V
Fig.19. Typical overload protection characteristics.
Conditions: V
DD
= 13 V; V
PS
= V
PSN
, V
IS
= 7 V; SC load
Fig.20. Typical overload protection energy, T
= 25 C
E
SC(TO)
= f(V
PS
); conditions: V
DS
= 13 V, parameter V
IS
Fig.21. Typical clamping characteristics, 25 C.
I
D
= f(V
DS
); conditions: R
IS
= 100
; t
p
50
μ
s
0
2
4
6
8
10
VIS / V
VDDP(P) / V
BUK114-50L/S
50
40
30
20
10
0
max
-60
-20
20
60
100
140
180
220
Tmb / C
BUK114-50L/S
0.5
0
Energy / J
Time / ms
Tj(TO)
Energy & Time
0.4
0.3
0.2
0.1
0
2
4
6
8
10
VIS / V
VPSP / V
BUK114-50L/S
10
8
6
4
2
0
min
BUK114-50L
BUK114-50S
0
2
4
6
8
10
VPS / V
ESC(TO) / J
BUK114-50L/S
0.4
0.3
0.2
0.1
0
BUK114-50L
BUK114-50S
VIS / V =
5
10
5
10
0.1
1
10
POWER / kW
TIME / ms
BUK114-50L/S
10
1
0.1
PDSM
50
60
70
BUK114-50L/S
VDS / V
ID / A
20
15
10
5
0
typ.
September 1996
9
Rev 1.000
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