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參數(shù)資料
| 型號： | BUF20820 |
| 英文描述： | 18-Channel GAMMA VOLTAGE GENERATOR with Two Programmable VCOM Channels |
| 中文描述： | 18通道伽瑪雙通道可編程的VCOM電壓發(fā)生器 |
| 文件頁數(shù)： | 11/32頁 |
| 文件大?。?/td> | 1826K |
| 代理商： | BUF20820 |
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SBOS330C DECEMBER 2005 REVISED OCTOBER 2006
www.ti.com
11
Write: OTP Memory for the DAC Register
The BUF20820 is able to write to the OTP memory of a
single DAC, or multiple DACs in a single communication
transaction. DAC addresses begin with 00000 (which
corresponds to DAC_1) through 10011 (which corre-
sponds to V
COM OUT2
).
When programming the OTP memory, the analog supply
voltage must be between 8.5V and 18V.
Write commands are performed by setting the read/write
bit LOW.
To write to a single OTP register:
1.
Send a START condition on the bus.
2.
Send the device address and read/write bit = LOW.
The BUF20820 will acknowledge this byte.
3.
Send a DAC address byte. Bits D7D5 must be set to
0. Bits D4D0 are the DAC address. Only DAC
addresses 00000 to 10100 are valid and will be
acknowledged. See Table 3 for DAC addresses.
4.
Send two bytes of data for the OTP register of the
specified DAC. Begin by sending the most significant
byte first (bits D15D8, of which only bits D9 and D8
are data bits, and bits D15D14 must be 01), followed
by the least significant byte (bits D7D0). For address
10100, only D0 has meaning. This bit is the write
disable bit. The register is updated after receiving the
second byte.
5.
Send a STOP condition on the bus.
The BUF20820 will acknowledge each data byte. If the
master terminates communication early by sending a
STOP or START condition on the bus, the specified OTP
register will not be updated. Writing an OTP register will
also update the DAC register and output voltage.
To write to multiple OTP registers:
1.
Send a START condition on the bus.
2.
Send the device address and read/write bit = LOW.
The BUF20820 will acknowledge this byte.
3.
Send either the DAC_1 address byte to start at the
OTP register of the first DAC, or send the address byte
for whichever DAC will be the first in the sequence to
be updated. The BUF20820 will begin with the OTP
register of this DAC and step through subsequent
registers in sequential order.
4.
Send the bytes of data; begin by sending the most
significant byte (bits D15D8, of which only bits D9
and D8 have meaning, and bits D15D14 must be 01),
followed by the least significant byte (bits D7D0). The
first two bytes are for the OTP register of the DAC
addressed in step 3 above. This OTP register is
automatically updated after receiving the second byte.
The next two bytes are for the OTP register of the
following DAC (bits D15D14 must again be 01). That
DAC OTP register is updated after receiving the fourth
byte. This process continues until the registers of all
following DAC OTP registers have been updated. The
last address, 10100, is the address of the write disable
bit and cannot be accessed using this method. It must
be written using the
write to a single OTP register
procedure.
5.
Send a STOP condition on the bus.
The BUF20820 will acknowledge each byte. To terminate
communication, send a STOP or START condition on the
bus. Only DAC registers that have received both bytes of
data will be programmed.
OTP WRITE DISABLE
Writing a ‘1’ in bit D0 of register 10100 disables all future
writes. The state of this bit can be accessed the same as
any other data bit. It is important to set this bit to 1 after the
OTP registers have been programmed to prevent
accidental changes to the OTP registers. Until bit D0 of
register 10100 is set to 1, any OTP register bit can be
changed from 0 to 1; however, once a bit is set to a 1, it
cannot be set back to 0.
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