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    • 您現(xiàn)在的位置:買賣IC網(wǎng) > PDF目錄255899 > BU-61864G3-432 (DATA DEVICE CORP) 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 PDF資料下載
    參數(shù)資料
    型號: BU-61864G3-432
    廠商: DATA DEVICE CORP
    元件分類: 微控制器/微處理器
    英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
    封裝: 25.40 X 25.40 MM, 2.54 MM HEIGHT, CERAMIC, QFP-72
    文件頁數(shù): 18/60頁
    文件大小: 457K
    代理商: BU-61864G3-432
    第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁
    25
    Data Device Corporation
    www.ddc-web.com
    BU-6174X/6184X/6186X
    F-10/02-300
    SINGLE BUFFERED MODE
    The operation of the single buffered RT mode is illustrated in
    FIGURE 6. In the single buffered mode, the respective lookup
    table entry must be written by the host processor. Received data
    words are written to, or transmitted data words are read from the
    data word block with starting address referenced by the lookup
    table pointer. In the single buffered mode, the current lookup
    table pointer is not updated by the Enhanced Mini-ACE/-ACE
    memory management logic. Therefore, if a subsequent message
    is received for the same subaddress, the same Data Word block
    will be overwritten or overread.
    SUBADDRESS DOUBLE BUFFERING MODE
    The Enhanced Mini-ACE/-ACE provides a double buffering
    mechanism for received data, that may be selected on an individ-
    ual subaddress basis for any or all receive (and/or broadcast) sub-
    addresses. This is illustrated in FIGURE 7. It should be noted that
    the Subaddress Double Buffering mode is applicable for receive
    data only, not for transmit data. Double buffering of transmit
    messages may be easily implemented by software techniques.
    The purpose of the subaddress double buffering mode is to pro-
    vide data sample consistency to the host processor. This is
    accomplished by allocating two 32-word data word blocks for
    each individual receive (and/or broadcast receive) subaddress.
    At any given time, one of the blocks will be designated as the
    "active" 1553 block while the other will be considered as "inac-
    tive". The data words for the next receive command to that sub-
    address will be stored in the active block. Following receipt of a
    valid message, the Enhanced Mini-ACE/-ACE will automatical-
    ly switch the active and inactive blocks for that subaddress. As a
    result, the latest, valid, complete data block is always accessible
    to the host processor.
    CIRCULAR BUFFER MODE
    The operation of the Enhanced Mini-ACE/-ACE's circular buffer
    RT memory management mode is illustrated in FIGURE 8. As in
    the single buffered and double buffered modes, the individual
    lookup table entries are initially loaded by the host processor. At
    the start of each message, the lookup table entry is stored in the
    third position of the respective message block descriptor in the
    descriptor stack area of RAM. Receive or transmit data words
    are transferred to (from) the circular buffer, starting at the loca-
    tion referenced by the lookup table pointer.
    In general, the location after the last data word written or read
    (modulo the circular buffer size) during the message is written to
    the respective lookup table location during the end-of-message
    sequence. By so doing, data for the next message for the respec-
    tive transmit, receive(/broadcast), or broadcast subaddress will
    be accessed from the next lower contiguous block of locations in
    the circular buffer.
    For the case of a receive (or broadcast receive) message with a
    data word error, there is an option such that the lookup table
    pointer will only be updated following receipt of a valid message.
    That is, the pointer will not be updated following receipt of a
    message with an error in a data word. This allows failed mes-
    sages in a bulk data transfer to be retried without disrupting the
    circular buffer data structure, and without intervention by the
    RT's host processor.
    GLOBAL CIRCULAR BUFFER
    Beyond the programmable choice of single buffer mode, double
    buffer mode, or circular buffer mode, programmable on an indi-
    vidual subaddress basis, the Enhanced Mini-ACE/-ACE RT
    architecture provides an additional option, a variable sized glob-
    FIGURE 6. RT SINGLE BUFFERED MODE
    DATA
    BLOCKS
    DATA BLOCK
    BLOCK STATUS WORD
    TIME TAG WORD
    DATA BLOCK POINTER
    RECEIVED COMMAND
    WORD
    DESCRIPTOR
    STACKS
    LOOK-UP
    TABLE ADDR
    LOOK-UP TABLE
    (DATA BLOCK ADDR)
    15
    13
    0
    CURRENT
    AREA B/A
    CONFIGURATION
    REGISTER
    STACK
    POINTERS
    (See note)
    Note: Lookup table is not used for mode commands when enhanced mode codes are enabled.
    相關PDF資料
    PDF描述
    BU-61864G3-440Y 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
    BU-61864G3-442K 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
    BU-61864G3-442S 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
    BU-61864G3-442W 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
    BU-61864G3-450K 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
    相關代理商/技術參數(shù)
    參數(shù)描述
    BU-61864G4-100 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC
    BU-61864G4-110 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC
    BU-61864G4-200 制造商:DDC 功能描述:MIL-STD-1553/ARINC BUS CONTROLLER/RTU, 72 Pin, QFP
    BU-61865 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553 Components |Enhanced Mini-ACE?
    BU-61865F3-100 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC
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