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參數(shù)資料
| 型號： | BTS725-L1 |
| 元件分類： | TVS-瞬態(tài)抑制二極管 |
| 英文描述： | Transient Voltage Suppressor Diodes |
| 中文描述： | ？5.0 - 24V的。 2x60mΩ極限（可控硅）17A條示波器- 20 - 9？ |
| 文件頁數(shù)： | 7/14頁 |
| 文件大小： | 470K |
| 代理商： | BTS725-L1 |
PROFET
BTS 721 L1
Data Book
610
01.07.97
Truth Table
Channel 1 and 2
Channel 3 and 4
(equivalent to channel 1 and 2)
Chip 1
Chip 2
IN1
IN3
IN2
IN4
OUT1
OUT3
OUT2
OUT4
ST1/2
ST3/4
BTS 721L1
H
H
H
H
H(L
14
))
H
L
H(L
14
))
H
L
L
15
)
H
H(L
16
))
L
15)
H
H(L
16
))
H
L
L
H
L
H
L
H
Normal operation
L
L
H
H
L
L
H
L
H
X
L
L
H
L
H
L
H
L
H
X
L
L
H
L
H
X
L
L
H
H
Z
Z
H
L
H
X
H
H
H
L
H
L
H
L
H
X
Z
Z
H
L
H
X
Open load
Channel 1 (3)
Channel 2 (4)
Short circuit to Vbb
Channel 1 (3)
Channel 2 (4)
L
H
X
L
X
H
L
H
X
X
X
L
L
H
L
H
X
X
X
L
H
X
L
H
X
L
L
L
L
L
X
X
L
H
H
H
L
L
L
X
X
L
L
L
Overtemperature
both channel
Channel 1 (3)
Channel 2 (4)
Undervoltage/ Overvoltage
L = "Low" Level
H = "High" Level
X = don't care
Status signal valid after the time delay shown in the timing diagrams
Z = high impedance, potential depends on external circuit
Parallel switching of channel 1 and 2 (also channel 3 and 4) is easily possible by connecting the inputs and
outputs in parallel (see truth table). If switching channel 1 to 4 in parallel, the status outputs ST1/2 and ST3/4
have to be configured as a 'Wired OR' function with a single pull-up resistor.
Terms
PROFET
Chip 1
IN2
ST1/2
OUT2
GND1/2
2
Vbb
VOUT2
IGND1/2
VON2
18
Leadframe
3
4
IN1
VOUT1
VON1
IL1
OUT1
5
17
VIN1
VIN2VST1/2
Ibb
IIN1
IIN2
IST1/2
IL2
RGND1/2
Vbb
PROFET
Chip 2
IN4
ST3/4
OUT4
GND3/4
6
Vbb
VOUT4
IGND3/4
VON4
14
Leadframe
7
8
IN3
VOUT3
VON3
IL3
OUT3
9
13
VIN3
VIN4VST3/4
IIN3
IIN4
IST3/4
IL4
RGND3/4
Leadframe (V
bb
) is connected to pin 1,10,11,12,15,16,19,20
External R
GND
optional; two resistors R
GND1/2
,R
GND3/4
=
150
or a single resistor R
GND
=
75
for
reverse battery protection up to the max. operating voltage.
14
)With additional external pull up resistor
15)
An external short of output to V
bb
in the off state causes an internal current from output to ground. If R
GND
is
used, an offset voltage at the GND and ST pins will occur and the V
ST low
signal may be errorious.
16
)Low resistance to
V
bb
may be detected by no-load-detection
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