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參數(shù)資料
| 型號(hào)： | BST100 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 小信號(hào)晶體管 |
| 英文描述： | P-channel enhancement mode vertical D-MOS transistors(P溝道增強(qiáng)型垂直D-MOS晶體管) |
| 中文描述： | 300 mA, 60 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, TO-92 |
| 封裝： | PLASTIC, SOT-54 (TO-92) VARIANT, 3 PIN |
| 文件頁數(shù)： | 2/12頁 |
| 文件大小： | 67K |
| 代理商： | BST100 |
April 1995
2
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BST100
DESCRIPTION
P-channel vertical D-MOS transistor
TO-92 variant envelope and intended
for use in relay, high-speed and
line-transformer drivers.
FEATURES
Very low R
DS(on)
Direct interface to C-MOS
High-speed switching
No second breakdown
QUICK REFERENCE DATA
PINNING - TO-92 VARIANT
Drain-source voltage
Gate-source voltage (open drain)
Drain current (DC)
Total power dissipation up to T
amb
= 25
°
C
Drain-source ON-resistance
I
D
= 200 mA;
V
GS
= 10 V
V
DS
±
V
GSO
I
D
P
tot
max.
max.
max.
max.
60 V
20 V
0.3 A
1 W
typ.
max.
4,5
6
R
DS(on)
Transfer admittance
I
D
= 200 mA;
V
DS
= 15 V
Y
fs
typ.
200 mS
1
2
3
= source
= gate
= drain
PIN CONFIGURATION
Fig.1 Simplified outline and symbol.
Note: various pinout configurations available.
handbook, halfpage
MAM144
1
3
2
s
d
g
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