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參數(shù)資料
| 型號(hào)： | BSP127 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | N-channel enhancement mode vertical D-MOS transistor |
| 中文描述： | 0.35 A, 270 V, 8 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 文件頁數(shù)： | 2/8頁 |
| 文件大小： | 50K |
| 代理商： | BSP127 |
April 1995
2
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BSP127
FEATURES
Direct interface to C-MOS, TTL,
etc.
High-speed switching
No secondary breakdown.
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in a
SOT223 envelope and intended for
use as a line current interruptor in
telephone sets and for applications in
relay, high-speed and line
transformer drivers.
PINNING - SOT223
PIN
DESCRIPTION
Code: BSP127
gate
drain
source
drain
1
2
3
4
QUICK REFERENCE DATA
SYMBOL
PARAMETER
MAX.
UNIT
V
DS
I
D
R
DS(on)
V
GS(th)
drain-source voltage
DC drain current
drain-source on-resistance
gate-source threshold voltage
270
350
8
2
V
mA
V
Fig.1 Simplified outline (SOT223) and symbol.
handbook, halfpage
MAM054
4
1
2
3
Top view
s
d
g
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
THERMAL RESISTANCE
Note
1.
Device mounted on an epoxy printed circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum 6 cm
2
.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DS
±
V
GSO
I
D
I
DM
P
tot
T
stg
T
j
drain-source voltage
gate-source voltage
DC drain current
peak drain current
total power dissipation
storage temperature range
junction temperature
65
270
20
350
1.4
1.5
150
150
V
V
mA
A
W
°
C
°
C
open drain
up to T
amb
= 25
°
C (note 1)
SYMBOL
PARAMETER
THERMAL RESISTANCE
R
th j-a
from junction to ambient (note 1)
83.3 K/W
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