參數(shù)資料
型號(hào)： BS62LV2006STIG55
廠商： BRILLIANCE SEMICONDUCTOR, INC.
英文描述： Very Low Power/Voltage CMOS SRAM 256K X 8 bit
中文描述： 非常低功率/電壓CMOS SRAM的256K × 8位
文件頁(yè)數(shù)： 5/9頁(yè)
文件大?。?/td> 321K
代理商： BS62LV2006STIG55
R0201-BS62LV2006
Revision 1.1
Jan.
2004
5
BSI
READ CYCLE3 (1,4)
READ CYCLE2 (1,3,4)
NOTES:
1. WE is high in read Cycle.
2. Device is continuously selected when CE1 = VIL and CE2= VIH.
3. Address valid prior to or coincident with CE1 transition low and/or CE2 transition high.
4. OE = VIL
.
5. The parameter is guaranteed but not 100% tested.
t CLZ
(5)
D
OUT
CE2
CE1
(5)
t ACS2
t ACS1
t OH
t RC
t OE
t CLZ2
t CHZ2
(2,5)
D
OUT
CE2
CE1
OE
ADDRESS
(5)
t CLZ1
(5)
t ACS1
t ACS2
t CHZ1
(1,5)
t OHZ (5)
t OLZ
t AA
t CHZ1, t CHZ2
BS62LV2006
SWITCHING WAVEFORMS (READ CYCLE)
READ CYCLE1 (1,2,4)
t RC
t OH
t AA
D
OUT
ADDRESS
t OH
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