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參數(shù)資料
| 型號(hào)： | BQ4010Y |
| 英文描述： | Avalanche Bridge Rectifiers |
| 中文描述： | 8Kx8非易失SRAM |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 450K |
| 代理商： | BQ4010Y |
7
bq4013/Y
Write Cycle
(TA=TOPR , VCCmin
≤
VCC
≤
VCCmax)
Symbol
Parameter
-70/-70N
-85/-85N
-120
Units
Conditions/Notes
Min. Max. Min. Max. Min. Max.
t
WC
Write cycle time
70
-
85
-
120
-
ns
t
CW
Chip enable to end of
write
65
-
75
-
100
-
ns
(1)
t
AW
Address valid to end of
write
65
-
75
-
100
-
ns
(1)
t
AS
Address setup time
0
-
0
-
0
-
ns
Measured from address valid
to beginning of write. (2)
t
WP
Write pulse width
55
-
65
-
85
-
ns
Measured from beginning of
write to end of write. (1)
t
WR1
Write recovery time
(write cycle 1)
5
-
5
-
5
-
ns
Measured from WE going high
to end of write cycle. (3)
t
WR2
Write recovery time
(write cycle 2)
15
-
15
-
15
-
ns
Measured from CE going high
to end of write cycle. (3)
t
DW
Data valid to end of
write
30
-
35
-
45
-
ns
Measured to first low-to-high
transition of either CE or WE.
t
DH1
Data hold time
(write cycle 1)
0
-
0
-
0
-
ns
Measured from WE going high
to end of write cycle. (4)
t
DH2
Data hold time
(write cycle 2)
10
-
10
-
10
-
ns
Measured from CE going high
to end of write cycle. (4)
t
WZ
Write enabled to output
in high Z
0
25
0
30
0
40
ns
I/O pins are in output state. (5)
t
OW
Output active from end
of write
0
-
0
-
0
-
ns
I/O pins are in output state. (5)
Notes:
1.
A write ends at the earlier transition of CE going high and WE going high.
2.
A write occurs during the overlap of a low CE and a low WE. A write begins at the later transition
of CE going low and WE going low.
3.
Either t
WR1
or t
WR2
must be met.
4.
Either t
DH1
or t
DH2
must be met.
5.
If CE goes low simultaneously with WE going low or after WE going low, the outputs remain in
high-impedance state.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BQ4015YMB-85N | Avalanche Bridge Rectifiers |
| BQ4015MB-120 | Avalanche Bridge Rectifiers |
| BQ4015MB-85 | Avalanche Bridge Rectifiers |
| BQ4015YMB-120 | Avalanche Bridge Rectifiers |
| BQ4015YMB-120N | Avalanche Bridge Rectifiers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BQ4010Y-150 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:8Kx8 Nonvolatile SRAM |
| BQ4010Y-200 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:8Kx8 Nonvolatile SRAM |
| BQ4010Y-70 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:8Kx8 Nonvolatile SRAM |
| BQ4010Y-85 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:8Kx8 Nonvolatile SRAM |
| BQ4010YMA-150 | 功能描述:NVRAM 8Kx8 Nonvolatile SRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲(chǔ)容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時(shí)間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
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