參數(shù)資料
型號(hào): BQ3285LQ
英文描述: Real-Time Clock
中文描述: 實(shí)時(shí)時(shí)鐘
文件頁數(shù): 18/26頁
文件大?。?/td> 831K
代理商: BQ3285LQ
18
bq3285EC/LC
July 1996
Read/Write Timing—bq3285LC
(T
A
= T
OPR
, V
CC
= 3V
±
10%)
Symbol
Parameter
Minimum
Typical
Maximum
Unit
Notes
t
CYC
Cycle time
270
-
-
ns
t
DSL
DS low or RD/WR high time
135
-
-
ns
t
DSH
DS high or RD/WR low time
90
-
-
ns
t
RWH
R/W hold time
0
-
-
ns
t
RWS
R/W setup time
15
-
-
ns
t
CS
Chip select setup time
8
-
-
ns
t
CH
Chip select hold time
0
-
-
ns
t
DHR
Read data hold time
0
-
40
ns
t
DHW
Write data hold time
0
-
-
ns
t
AS
Address setup time
30
-
-
ns
t
AH
Address hold time
15
-
-
ns
t
DAS
Delay time, DS to AS rise
15
-
-
ns
t
ASW
Pulse width, AS high
50
-
-
ns
t
ASD
Delay time,AS toDS rise(RD/WR fall)
55
-
-
ns
t
OD
Output data delay time from DS rise
(RD fall)
-
-
100
ns
t
DW
Write data setup time
50
-
-
ns
t
BUC
Delay time before update cycle
-
244
-
μ
s
t
PI
Periodic interrupt time interval
-
-
-
-
See Table 3
t
UC
Time of update cycle
-
1
-
μ
s
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