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參數(shù)資料
| 型號(hào)： | BH16823ADGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 18-bit bus interface D-type flip-flop with reset and enable 3-State |
| 中文描述： | ABT SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 6.10 MM, PLASTIC, SOT-364-1, TSSOP2-56 |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 86K |
| 代理商： | BH16823ADGG |
Philips Semiconductors
Product specification
74ABT16823A
74ABTH16823A
18-bit bus-interface D-type flip-flop
with reset and enable (3-State)
1998 Feb 27
8
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
M
SH00017
nCP
nQx
V
M
t
w
(H)
t
PHL
V
M
t
PLH
1/f
MAX
t
w
(L)
V
M
3.0V or V
CC
whichever
is less
0V
0V
V
OH
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
V
M
nMR
V
M
nQx
t
w
(L)
V
M
t
PHL
V
M
t
REC
nCP
SH00018
3.0V or V
CC
whichever
is less
0V
3.0V or V
CC
whichever
is less
0V
0V
V
OH
Waveform 2. Master Reset Pulse WIdth, Master Reset to
Output Delay and Master Reset to Clock Recovery Time
t
h
(H)
t
s
(H)
nCP
V
M
V
M
V
M
V
M
V
M
V
M
t
h
(L)
t
s
(L)
nDx,
nCE
SH00019
3.0V or V
CC
whichever
is less
0V
3.0V or V
CC
whichever
is less
0V
Waveform 3. Data Setup and Hold Times
V
OH
–0.3V
V
M
V
M
V
M
nQx
t
PZH
t
PHZ
nOE
0V
V
OH
SH00020
3.0V or V
CC
whichever
is less
0V
Waveform 4. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
nOE
t
PZL
t
PLZ
V
OL
+0.3V
V
OL
nQx
SH00021
V
M
V
M
V
M
3.0V or V
CC
whichever
is less
0V
3.0V or V
CC
whichever
is less
Waveform 5. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BH16823ADL | 18-bit bus interface D-type flip-flop with reset and enable 3-State |
| BH16825ADGG | 18-bit buffer/line driver; non-inverting 3-State |
| BH16825ADL | 18-bit buffer/line driver; non-inverting 3-State |
| BH16827ADGG | 20-bit buffer/line driver, non-inverting 3-State |
| BH16827ADL | 20-bit buffer/line driver, non-inverting 3-State |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BH16823ADL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit bus interface D-type flip-flop with reset and enable 3-State |
| BH16825ADGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit buffer/line driver; non-inverting 3-State |
| BH16825ADL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit buffer/line driver; non-inverting 3-State |
| BH16827ADGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:20-bit buffer/line driver, non-inverting 3-State |
| BH16827ADL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:20-bit buffer/line driver, non-inverting 3-State |
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