參數(shù)資料
型號(hào)： BH16501ADL
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： 18-bit universal bus transceiver 3-State
中文描述： ABT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
文件頁(yè)數(shù)： 2/13頁(yè)
文件大?。?/td> 88K
代理商： BH16501ADL
Philips Semiconductors
Product specification
74ABT16501A
74ABTH16501A
18-bit universal bus transceiver (3-State)
2
1998 Feb 27
853-1788 19027
FEATURES
18-bit bidirectional bus interface
3-State buffers
Output capability: +64mA/-32mA
TTL input and output switching levels
74ABTH16501A incorporates bus-hold data inputs which
eliminate the need for external pull-up resistors to hold unused
inputs
Live insertion/extraction permitted
Power-up reset
Power-up 3-State
Positive edge-triggered clock inputs
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
Flexible operation permits 18 embedded D-type latches or
flip-flops to operate in clocked, transparent, and latched modes.
DESCRIPTION
The 74ABT16501A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
This device is an 18-bit universal transceiver featuring non-inverting
3-State bus compatible outputs in both send and receive directions.
Data flow in each direction is controlled by output enable (OEAB and
OEBA), latch enable (LEAB and LEBA), and clock (CPAB and
CPBA) inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is High. When LEAB is Low, the A
data is latched if CPAB is held at a High or Low logic level. If LEAB
is Low, the A-bus data is stored in the latch/flip-flop on the
Low-to-High transition of CPAB. When OEAB is High, the outputs
are active. When OEAB is Low, the outputs are in the
high-impedance state.
Data flow for B-to-A is similar to that of A-to-B but uses OEBA,
LEBA and CPBA. The output enables are complimentary (OEAB is
active High, and OEBA is active Low).
Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
Two options are available, 74ABT16501A which does not have the
bus-hold feature and 74ABTH16501A which incorporates the
bus-hold feature.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C; GND = 0V
C
L
= 50pF;
V
CC
= 5V
V
I
= 0V or V
CC
Outputs disabled; V
I/O
= 0V or V
CC
Outputs disabled; V
CC
= 5.5V
Outputs low; V
CC
= 5.5V
TYPICAL
UNIT
t
PLH
t
PHL
C
IN
C
I/O
I
CCZ
I
CCL
Propagation delay
An to Bn or Bn to An
2.2
1.8
ns
Input capacitance (Control pins)
3
pF
I/O pin capacitance
7
pF
Quiescent supply current
500
μ
A
9
mA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
56-Pin Plastic SSOP Type III
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
74ABT16501A DL
BT16501A DL
SOT371-1
56-Pin Plastic TSSOP Type II
74ABT16501A DGG
BT16501A DGG
SOT364-1
56-Pin Plastic SSOP Type III
74ABTH16501A DL
BH16501A DL
SOT371-1
56-Pin Plastic TSSOP Type II
74ABTH16501A DGG
BH16501A DGG
SOT364-1
相關(guān)PDF資料
PDF描述
BH16646DL 16-bit bus transceiver/register 3-State
BH16646DGG 16-bit bus transceiver/register 3-State
BH16652DGG 16-bit transceiver/register, non-inverting 3-State
BH16652DL 16-bit transceiver/register, non-inverting 3-State
BH16821ADGG 20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
BH16541DGG 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit buffer/line driver 3-State
BH16541DL 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit buffer/line driver 3-State
BH16543DGG 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit latched transceivers with dual enable 3-State
BH16543DL 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit latched transceivers with dual enable 3-State
BH16646DGG 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit bus transceiver/register 3-State
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