參數資料
型號： BH161543DL
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： 16-bit latched transceiver with dual enable and master reset 3-State
中文描述： ABT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝： PLASTIC, SSOP3-56
文件頁數： 8/12頁
文件大?。?/td> 85K
代理商： BH161543DL
Philips Semiconductors
Product specification
74ABT161543
74ABTH161543
16-bit latched transceiver with dual enable
and master reset (3-State)
1998 Feb 27
8
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
V
IN
V
M
t
PHL
t
PLH
V
M
V
M
V
M
V
OUT
SH00040
Waveform 1. Propagation Delay For Inverting Output
V
M
t
PLH
t
PHL
V
M
V
M
V
M
V
IN
V
OUT
SH00041
Waveform 2. Propagation Delay For Non-Inverting Output
ééé
ééé
ééé
t
(H)
ééééééééé
ééééééééé
ééééééééé
V
M
nAx, nBx
V
M
V
M
V
M
V
M
V
M
nLEAB, nLEBA,
nEAB, nEBA
t
(L)
t
w
(L)
NOTE:
The shaded areas indicate when the input is permitted
to change for predictable output performance.
SH00042
Waveform 3. Data Setup and Hold Times and Latch Enable
Pulse Width
nOEAB, nOEBA,
nEAB, nEBA
V
M
t
PZH
t
PHZ
0V
V
OH
–0.3V
V
M
V
M
nAx, nBx
V
OH
SH00043
Waveform 4. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
t
PZL
t
PLZ
V
OL
+0.3V
V
OL
V
M
V
M
V
M
nOEAB, nOEBA,
nEAB, nEBA
nAx, nBx
SH00044
Waveform 5. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
MR
V
M
t
PHL
V
M
V
M
nAx, nBx
SH00043
t
W
(L)
Waveform 6. Master Reset Pulse Width, Master
Reset to Output Delay
相關PDF資料
PDF描述
BH161543DGG 16-bit latched transceiver with dual enable and master reset 3-State
BH162240DGG 16-bit inverting buffer/driver with 30ohm series termination resistors
BH162240DL 16-bit inverting buffer/driver with 30ohm series termination resistors
BH162244DL 16-bit buffer/line driver with 30ohm series termination resistors 3-State
BH162244DGG 16-bit buffer/line driver with 30ohm series termination resistors 3-State
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