參數(shù)資料
型號(hào): BD9153MUV-E2
廠商: Rohm Semiconductor
文件頁數(shù): 14/21頁
文件大?。?/td> 630K
描述: IC REG TRPL BCK/LINEAR 24VQFN
特色產(chǎn)品: CMOS LDO Regulators
標(biāo)準(zhǔn)包裝: 1
拓?fù)洌?/td> 降壓(降壓)同步(2),線性(LDO)(1)
功能: 任何功能
輸出數(shù): 3
頻率 - 開關(guān): 1MHz
電壓/電流 - 輸出 1: 1.8 V ~ 3.3 V,1.5A
電壓/電流 - 輸出 2: 0.8 V ~ 2.5 V,1.5A
電壓/電流 - 輸出 3: 控制器
帶 LED 驅(qū)動(dòng)器:
帶監(jiān)控器:
帶序列發(fā)生器:
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-VQFN
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: BD9153MUV-E2DKR
Technical Note
 
14/18 
www.rohm.com
2009.08 - Rev.A
?2009 ROHM Co., Ltd. All rights reserved.
BD9153MUV 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load
resistance with CR zero correction by the error amplifier.
 
 
 
 
 
 
 
 
5. Determination of VOUT1~3 output voltage
 
The output voltage VOUT1~3 is determined by the equation (6)~(8):
VOUT1=(R2/R1+1)譜FB1?6) VFB1: Voltage at FB terminal (0.8V Typ.)
VOUT2=(R4/R3+1)譜FB2?7) VFB2: Voltage at FB terminal (0.8V Typ.)
VOUT3=(R6/R5+1)譜FB3?8) VFB3: Voltage at FB terminal (0.8V Typ.)
With R1~R6 adjusted, the output voltage may be determined as required.
 
 
 
 Fig.41 Determination of output voltage
 
Use 1 k&^100 k& resistor for R1. If a resistor of the resistance higher than 100 k& is used, check the assembled set
carefully for ripple voltage etc.
 
 
 
Fig.40 Typical application
fz(Amp.)= fp(Min.)
2雷R(shí)ITHITH
1
=
2雷R(shí)OMax.O
1
SW1
 
 
FB1
L1
Cout1
R2
R1
VOUT1
EN
FB2
SW2
ITH2
PGND2
SW2
PGND2 PVCC2 PVCC2
PVCC1
PVCC1 PGND1
PGND1
SW1
VS
FB1
ITH1
GATE
FB3
AVCC
DET
RST
AGND
RITH2
CITH2
L2
R4
R3
CIN2
R8
R7
CIN1
R2
R1
CO2
L1
CITH1
RITH1
R5
R6
CO3
M1
R9
  
  
 
SW1
CO1
Cfb
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