
ASIX ELECTRONICS CORPORATION
15
AX88658AB 8-Port 10/100/1000BASE-T Ethernet Switch
CONFIDENTIAL
4.0 Register Descriptions
Register Tables Summary:
Address 15
14
00 H
01 H
02 H
03 H
04 H
05 H
06 H
07 H
08 H
RESERVED
09 H
RESERVED
0A H
0B H
0C H
LowQueueWeight[3:0]
RESERVE
13
12
11
10
9
8
7
6
5
4
3
2
1
0 Default
0000 H
FFFF H
0000 H
00FF H
00FF H
0000 H
00FF H
1215 H
7777 H
7777 H
0000 H
0000 H
1060 H
RESERVED
RESERVED
RxFlowCtrl[7:0]
RESERVED
RESERVED
RESERVED
RESERVED
TxFlowCtrl[7:0]
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
PortPair1[7:0]
PortPair3[7:0]
PortPair0[7:0]
PortPair2[7:0]
D
lw_LowQueueDiscardLimit [9:0]
0D H
HighQueueWeight[3:0]
MaxStorm[1:0]
lw_HighQueueDiscardLimit [9:0]
0E H
RES
PTO
RES
MPS[1:0] SR
0F H
RESERVED
10 H Trunk47[2:0]
Trunk30[2:0]
11 H
RES RES
RESERVED
12 H
MaxJam[5:0]
13 H
RESERVED
14 H
RES
SmartFC
[1:0]
ED
15 H
Port-based VLAN Group #1
16 H
Port-based VLAN Group #3
17 H
Port-based VLAN Group #5
18 H
Port-based VLAN Group #7
19 H
ResolutionIngress Port 1[7:0]
1A H
ResolutionIngress Port 3[7:0]
1B H
ResolutionIngress Port 5[7:0]
1C H
ResolutionIngress Port 7[7:0]
1D H iso rm
MirrorPort[2:0] PortMirrorEn[
1:0]
1E H
UpdateSaForSecurity[7:0]
1F H
GCLK125MHz_Dly1ns_n[7:0]
1060 H
8880 H
1865 H
00C0 H
0010 H
2810 H
0070 H
0070 H
SP
NSB
RES
51TE
RES
QoS[1:0] AE HM DB
MaxAge[8:0]
RESERVED
LowQueueFlowCtrlMark[9:0]
HighQueueFlowCtrlMark[9:0]
hw_LowQueueDiscardLimit[9:0]
hw_HighQueueDiscardLimit[9:0]
RES
RESERV
Port-based VLAN Group #0
Port-based VLAN Group #2
Port-based VLAN Group #4
Port-based VLAN Group #6
ResolutionIngress Port 0[7:0]
ResolutionIngress Port 2[7:0]
ResolutionIngress Port 4[7:0]
ResolutionIngress Port 6[7:0]
ResolutionEngress Port 7[7:0]
0000 H
0000 H
0000 H
0000 H
FFFF H
FFFF H
FFFF H
FFFF H
00FF H
IngressMode
OneSaSecurityMode[7:0]
TargetPort[2:0]
JumboLeng13_10[3:0] JumboEnable
0000 H
0000 H
Note:
1. The word “Reserved” = “Res.” on the above table.
2. Care must be taken that the “Reserved” registers should keep the default value always. Change of any reserved value
may be resulting in unpredictable conditions.
3. The registers can be accessed by internal MPU only. The MPU will read in configuration table, located on EEPROM
at somewhere address, and programs the above registers when every time power on or after system reset.
4. Basically, the registers can be accessed with the same data format as station management (similar to MDC and
MDIO) via ADC and ADIO pins.