參數(shù)資料
型號: AX88196
廠商: Electronic Theatre Controls, Inc.
英文描述: 10/100BASE 3-in-1 Local CPU Bus Fast Ethernet Controller with Embedded SRAM
中文描述: 一個10/100Base 3合1本地CPU總線快速以太網(wǎng)控制器與嵌入式靜態(tài)存儲器
文件頁數(shù): 3/42頁
文件大?。?/td> 594K
代理商: AX88196
AX88196 Local CPU BUS MAC Controller
6.4.2 Reset Timing.............................................................................................................................................26
6.4.3 ISA Bus Access Timing..............................................................................................................................27
6.4.4 80186 Type I/O Access Timing..................................................................................................................28
6.4.5 68K Type I/O Access Timing.....................................................................................................................29
6.4.6 8051 Bus Access Timing ...........................................................................................................................30
6.4.7 MII Timing................................................................................................................................................31
6.4.8 SNI Timing................................................................................................................................................32
ASIX ELECTRONICS CORPORATION
3
7.0 PACKAGE INFORMATION...........................................................................................................................33
APPENDIX A: APPLICATION NOTE.................................................................................................................34
A.1 U
SING
C
RYSTAL
25MH
Z OR
20MH
Z
.................................................................................................................34
A.2 U
SING
O
SCILLATOR
25MH
Z OR
20MH
Z
............................................................................................................34
A.3 U
SING
60MH
Z
O
SCILLATOR
/C
RYSTAL
..............................................................................................................34
A.4 D
UAL POWER
(5V
AND
3.3V/3.0V)
APPLICATION
..............................................................................................35
A.5 S
INGLE POWER
(3.3V/3.0V)
APPLICATION
.........................................................................................................35
A.6 D
UAL POWER
(5V
AND
3.3V)
APPLICATION WITH
3.3V PHY .............................................................................36
ERRATA OF AX88196 VERSION ED2.................................................................................................................37
DEMONSTRATION CIRCUIT : AX88196 + ETHERNET PHY + HOMEPNA 1M8 PHY..............................38
FIGURES
F
IG
- 1 AX88196 B
LOCK
D
IAGRAM
..............................................................................................................................4
F
IG
- 2 AX88196 P
IN
C
ONNECTION
D
IAGRAM
...............................................................................................................5
F
IG
- 3 AX88196 P
IN
C
ONNECTION
D
IAGRAM FOR
ISA B
US
M
ODE
................................................................................6
F
IG
- 4 AX88196 P
IN
C
ONNECTION
D
IAGRAM FOR
80
X
86 M
ODE
...................................................................................7
F
IG
- 5 AX88196 P
IN
C
ONNECTION
D
IAGRAM FOR
MC68K M
ODE
................................................................................8
F
IG
- 6 AX88196 P
IN
C
ONNECTION
D
IAGRAM FOR
MCS-51 M
ODE
................................................................................9
TABLES
T
AB
- 1 L
OCAL
CPU
BUS INTERFACE SIGNALS GROUP
...................................................................................................11
T
AB
- 2 MII
INTERFACE SIGNALS GROUP
......................................................................................................................11
T
AB
- 3 EEPROM
BUS INTERFACE SIGNALS GROUP
......................................................................................................12
T
AB
- 4 S
ERIAL
N
ETWORK
I
NTERFACE PINS GROUP
......................................................................................................12
T
AB
- 5 S
TANDARD
P
RINTER
P
ORT
I
NTERFACE PINS GROUP
..........................................................................................13
T
AB
- 6 P
OWER ON CONFIGURATION SETUP PINS GROUP
................................................................................................13
T
AB
- 7 M
ISCELLANEOUS PINS GROUP
..........................................................................................................................14
T
AB
- 8 I/O A
DDRESS
M
APPING
..................................................................................................................................15
T
AB
- 9 L
OCAL
M
EMORY
M
APPING
.............................................................................................................................15
T
AB
- 10 P
AGE
0
OF
MAC C
ORE
R
EGISTERS
M
APPING
.................................................................................................16
T
AB
- 11 P
AGE
1
OF
MAC C
ORE
R
EGISTERS
M
APPING
.................................................................................................17
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