參數(shù)資料
型號： AX88190P
廠商： ASIX Electronics Corporation
英文描述： 10/100BASE PCMCIA Fast Ethernet MAC Controller
中文描述： 一個(gè)10/100Base的PCMCIA快速以太網(wǎng)MAC控制器
文件頁數(shù)： 2/41頁
文件大?。?/td> 465K
代理商： AX88190P
AX88190 PCMCIA Fast Ethernet MAC Controller
ASIX ELECTRONICS CORPORATION
2
CONTENTS
1.0 INTRODUCTION...............................................................................................................................................5
1.1 G
ENERAL
D
ESCRIPTION
: .....................................................................................................................................5
1.2 AX88190 B
LOCK
D
IAGRAM
:...............................................................................................................................5
1.3 AX88190 P
IN
C
ONNECTION
D
IAGRAM
................................................................................................................6
2.0 SIGNAL DESCRIPTION....................................................................................................................................7
2.1 PCMCIA B
US
I
NTERFACE
S
IGNALS
G
ROUP
.........................................................................................................7
2.2 EEPROM S
IGNALS
G
ROUP
.................................................................................................................................8
2.3 MII
INTERFACE SIGNALS GROUP
..........................................................................................................................8
2.4 M
ODEM INTERFACE PINS GROUP
..........................................................................................................................9
2.5 SRAM I
NTERFACE PINS GROUP
...........................................................................................................................9
2.6 M
ISCELLANEOUS PINS GROUP
............................................................................................................................10
2.7 P
OWER ON CONFIGURATION SETUP SIGNALS CROSS REFERENCE TABLE
.................................................................10
3.0 MEMORY AND I/O MAPPING .....................................................................................................................11
3.1 EEPROM M
EMORY
M
APPING
..........................................................................................................................11
3.2 A
TTRIBUTE
M
EMORY
M
APPING
.........................................................................................................................11
3.3 I/O M
APPING
....................................................................................................................................................12
3.4 SRAM M
EMORY
M
APPING
...............................................................................................................................12
4.0 REGISTERS OPERATION..............................................................................................................................13
4.1 PCMCIA F
UNCTION
C
ONFIGURATION
R
EGISTER
S
ET OF
LAN............................................................................13
4.1.1 Configuration Option Register of LAN (LCOR) Offset 3C0H (Read/Write)...............................................14
4.1.2 Configuration and Status Register of LAN (LCSR) Offset 3C2H (Read/Write)..........................................15
4.1.3 I/O Base Register 0/1 of LAN (LIOBASE0/1) Offset 3CAH/3CCH (Read/Write).......................................15
4.2 PCMCIA F
UNCTION
C
ONFIGURATION
R
EGISTER
S
ET OF
MODEM.....................................................................16
4.2.1 Configuration Option Register of MODEM (MCOR) Offset 3E0H (Read/Write).......................................16
4.2.2 Configuration and Status Register of MODEM (MCSR) Offset 3E2H (Read/Write)..................................17
4.2.3 I/O Base Register 0/1 of MODEM (MIOBASE0/1) Offset 3EAH/3ECH (Read/Write)...............................17
4.3 R
EGISTERS
O
PERATION
.....................................................................................................................................18
4.3.1 Command Register (CR) Offset 00H (Read/Write)....................................................................................20
4.3.2 Interrupt Status Register (ISR) Offset 07H (Read/Write)...........................................................................20
4.3.3 Interrupt mask register (IMR) Offset 0FH (Write) ....................................................................................21
4.3.4 Data Configuration Register (DCR) Offset 0EH (Write)...........................................................................21
4.3.5 Transmit Configuration Register (TCR) Offset 0DH (Write).....................................................................21
4.3.6 Transmit Status Register (TSR) Offset 04H (Read) ...................................................................................22
4.3.7 Receive Configuration (RCR) Offset 0CH (Write) ....................................................................................22
4.3.8 Receive Status Register (RSR) Offset 0CH (Read)....................................................................................22
4.3.9 Inter-frame gap (IFG) Offset 16H (Read/Write)........................................................................................22
4.3.10 Inter-frame gap Segment 1(IFGS1) Offset 12H (Read/Write)..................................................................23
4.3.11 Inter-frame gap Segment 2(IFGS2) Offset 13H (Read/Write)..................................................................23
4.3.12 MII/EEPROM Management Register (MEMR) Offset 14H (Read/Write).................................................23
4.3.13 Test Register (TR) Offset 15H (Write).....................................................................................................23
5.0 PCMCIA DEVICE ACCESS FUNCTIONS....................................................................................................24
5.1 A
TTRIBUTE
M
EMORY ACCESS FUNCTION FUNCTIONS
..........................................................................................24
5.2 I/O
ACCESS FUNCTION FUNCTIONS
.....................................................................................................................24
6.0 ELECTRICAL SPECIFICATION AND TIMINGS .......................................................................................25
6.1 A
BSOLUTE
M
AXIMUM
R
ATINGS
.........................................................................................................................25
6.2 G
ENERAL
O
PERATION
C
ONDITIONS
...................................................................................................................25
6.3 DC C
HARACTERISTICS
......................................................................................................................................25
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AX88195P 制造商:ASIX 制造商全稱:ASIX 功能描述:10/100BASE Local CPU Bus Fast Ethernet MAC Controller
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AX88196L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10/100BASE 3-in-1 Local CPU Bus Fast Ethernet Controller with Embedded SRAM
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