參數(shù)資料
型號(hào)： AX88140AQ
廠商： Electronic Theatre Controls, Inc.
英文描述： Fast Ethernet MAC Controller
中文描述： 快速以太網(wǎng)MAC控制器
文件頁數(shù)： 24/46頁
文件大小： 467K
代理商： AX88140AQ
AX88140A
3
PRELIMINARY
ASIX ELECTRONICS CORPORATION
24
R/W/C
TJT - Transmit Jabber Time-out
Indicates that the transmit jabber timer expired, meaning that the AX88140A transmitter had
been excessively active. The transmission process is aborted and placed in the stopped state.
This event causes the transmit jabber time-out TDES0<14> is set.
TU - Transmit Buffer Unavailable
Indicates that the nextdescriptor on thetransmit list is ownedbythe hostand cannot beacquired
by the AX88140A.The transmission process is suspended. To resume processing transmit
descriptors, the host should change the ownership bit of the descriptor and then issue a transmit
poll demand command.
TPS - Transmit Process Stopped
Asserts when the transmit process enters the stopped state.
TI - Transmit Interrupt
Indicates that a frame transmission was completed, while TDES1<31> is asserted in the first
descriptor of the frame.
2
R/W/C
1
R/W/C
0
R/W/C
Tab - 20 REG5 Status Register Description
4.2.7 Operation Mode Register (REG6)
REG6 establishes the receive and transmit operating modes and commands.
REG6 should be the last REG to be written as part of initialization.
1.
2.
Field
31
30
R/W/C
-
R/W
Description
Reserved
RA - Receive All
1
0
All incoming packets will be received
Filtering mode
29:25
24
-
Reserved.--Written as “0” for future compatibility concern.
SCR - Scrambler Mode
1
0
1
Enable Scrambler
Disable Scrambler
PCS functions are active
R/W
23
R/W
PCS - PCS Mode
0
MII/SYM port is not selected
1
Threshold is 10Mb/s
22
R/W
TTM - Transmit Threshold Mode
0
Threshold is 100Mb/s
1
0
Enable Store and Forward
Disable Store and Forward
21
R/W
SF - Store and Forward
20
19
-
Reserved.--Written as “0” for future compatibility concern.
HBD - Heartbeat Disable
1
0
1
Heartbeat Disable
Heartbeat Enable
MII/SYM port is selected.
R/W
18
R/W
PS - Port Select
0
SRL port is selected
17:16
15:14
-
Reserved.--Written as “0” for future compatibility concern.
TR - Threshold Control Bits
The threshold value has a direct impact on the AX88140A bus arbitration scheme . Transmission starts when
the frame size within the transmit FIFO
is larger than the threshold. In addition, full frames with a length
less than the threshold are also transmitted. The transmit process must be in the stopped state to change these
bits.
Controls the selected threshold level for the AX88140A transmit FIFO. Four threshold levels are allowed.
REG6<18>=0
REG6<18>=1
REG6<18>=1
REG6<21>
0
REG6<15:14>
00
REG6<22>=X
REG6<22>=1
REG6<22>=0
R/W
72
72
128
0
01
96
96
256
0
10
128
128
512
0
11
160
160
1024
1
XX
Store & Forward
Store & Forward
Store & Forward
1
0
1
0
Start Transmission
Stop Transmission
Enable force collision
Disable force collision
00 Normal
01 Internal Loop-back
10 External Loop-back
1
Full-Duplex
13
R/W
ST - Start/Stop Transmission
12
R/W
FC - Force Collision Mode
11:10
R/W
OM - Operating Mode
9
R/W
FD - Full-Duplex Mode
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