參數(shù)資料
型號(hào): AX88140AP
廠商: Electronic Theatre Controls, Inc.
英文描述: Fast Ethernet MAC Controller
中文描述: 快速以太網(wǎng)MAC控制器
文件頁(yè)數(shù): 20/46頁(yè)
文件大小: 467K
代理商: AX88140AP
AX88140A
PRELIMINARY
ASIX ELECTRONICS CORPORATION
20
4.0 Registers Operation
1.
The REGs are quad-word aligned, 32-bits long, and must be accessed using long-word
instruction with quad-word aligned addresses only.
2.
Reserved bits should be written with 0.; Reserved bits are UNPREDICTABLE on read
access.
3.
Retries on second data transactions occur in response to burst accesses.
4.1 Registers Mapping
REGISTER
MEANING
OFFSET FROM REG BASE ADDRESS
(CBIO,CBMA)
00H
08H
10H
18H
20H
28H
30H
38H
40H
48H
50H
58H
60H
68H
70H
REG0
REG1
REG2
REG3
REG4
REG5
REG6
REG7
REG8
REG9
REG10
REG11
REG12
REG13
REG14
BUS MODE
TRANSMIT POLL DEMAND
RECEIVE POLL DEMAND
RECEIVE LIST BASE ADDRESS
TRANSMIT LIST BASE ADDRESS
STATUS
OPERATION MODE
INTERRUPT ENABLE
MISSED FRAME AND OVERFLOW COUNTER
SERIAL ROM, AND MII MANAGEMENT
-
GENERAL-PURPOSE TIMER
GENERAL-PURPOSE PORT
FILTERING BUFFER INDEX
FILTERING BUFFER DATA
Tab - 14 Command and Status Register Mapping
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