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參數(shù)資料
| 型號(hào)： | AX88140AP |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Fast Ethernet MAC Controller |
| 中文描述： | 快速以太網(wǎng)MAC控制器 |
| 文件頁數(shù)： | 15/46頁 |
| 文件大?。?/td> | 467K |
| 代理商： | AX88140AP |
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AX88140A
PRELIMINARY
ASIX ELECTRONICS CORPORATION
15
MRCLK/SYMRCLK
I
128
114
Supports either the 25-MHZ or 2.5-MHZ receive
clock. This clock is recovered by the PHY.
Four parallel receive data lines When MII mode is
selected. This data is driven by an external PHY that
attached the media and should be synchronized with
the MRCLK/SYMRCLK signal.
Supports the 25-MHZ or 2.5-MHZ transmit clock
supplied by the external physical layer medium
dependent (PMD) device. This clock should always
be active.
Four parallel transmit data lines. This data is
synchronized to the assertion of the
MTCLK/SYMTCLK signal and is latched by the
external PHY on the rising edge of the
MTCLK/SYMTCLK signal.
Transmit enable signals that the transmit is active to
an external PHY device. In PCS mode (REG6<23>),
This signal reflects the transmit activity of the MAC
sub-layer.
Receive match indication is asserted when a received
packet has passed address recognition.
Receive match indication is asserted when a received
packet has passed address recognition.
Signal detect indication supplied by an external
physical layer medium dependent (PMD) device.
Collision detect signals a collision occurrence on the
Ethernet cable to the AX88140A. It may be asserted
and deasserted asynchronously by the external
ENDEC to the receive clock.
Receive clock carries the recovered receive clock
supplied by an external ENDEC. during idle periods,
SRL_RCLK may be inactive.
Receive data carries the input receive data from the
external ENDEC. The incoming data should be
synchronous with the SRL_RCLK signal.
Receive enable signals activity on the Ethernet cable
to the AX88140A. It is asserted when receive data is
present on the Ethernet cable and is deasserted at the
end of a frame. It may be asserted and deasserted
asynchronously to the receive clock (SRL_RCLK) by
the external ENDEC.
Transmit clock carries the transmit clock supplied by
an external ENDEC. This clock must always be
active (even during reset).
Transmit data carries the serial output data from the
AX88140A. This data is synchronized to the
SRL_TCLK signal.
Transmit enable signals an external ENDEC That the
AX88140A transmit is in progress.
Receive data, together with the four receive lines
MII/SYM_RXD<3:0>, Provide five parallel lines of
data in symbol from for use in PCS mode
(100BASE-T, REG6<23). This data is synchronized
on the rising edge of the MTCLK/SYMTCLK signal.
Transmit data, together with the our transmit lines
MII/SYM_TXD<3:0>,provide five parallel lines of
data in symbol form for use in PCS mode
(100BASE-T, REG6<23>). Thisdataissynchronized
on the rising edge of the MII/SYM_TCLK signal.
MRXD<3>/SYMRXD<3>
MRXD<2>/SYMRXD<2>
MRXD<1>/SYMRXD<1>
MRXD<0>/SYMRXD<0>
MTCLK/SYMTCLK
I
132,
131,
130,
129
137
118,
117,
116,
115
123
I
MTXD<3>/SYMTXD<3>
MTXD<2>/SYMTXD<2>
MTXD<1>/SYMTXD<1>
MTXD<0>/SYMTXD<0>
O
145,
144,
141,
140
131,
130,
127,
126
MTXEN/SYMTXEN
O
139
125
RCV_MATCH
O
136
122
SD
I
123
109
SRL_CLSN
I
148
134
SRL_RCLK
I
151
137
SRL_RXD
I
149
135
SRL_RXEN
I
150
136
SRL_TCLK
I
153
139
SRL_TXD
O
152
138
SRL_TXEN
O
154
140
SYMRXD <4>
I
133
119
SYMTXD<4>
O
146
132
Tab - 3 MII/SYM/SRL interface signals group
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AX88140AQ | Fast Ethernet MAC Controller |
| AX88196 | 10/100BASE 3-in-1 Local CPU Bus Fast Ethernet Controller with Embedded SRAM |
| AX88196L | 10/100BASE 3-in-1 Local CPU Bus Fast Ethernet Controller with Embedded SRAM |
| AX88796 | 3-in-1 Local Bus Fast Ethernet Controller |
| AX88796L | 3-in-1 Local Bus Fast Ethernet Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AX88140AQ | 制造商:ASIX 制造商全稱:ASIX 功能描述:Fast Ethernet MAC Controller |
| AX88141 | 制造商:ASIX 制造商全稱:ASIX 功能描述:100BASE-TX/FX PCI BUS FAST ETHERNET MAC CONTROLLER WITH POWER MANAGEMENT |
| AX88170L | 制造商:ASIX 制造商全稱:ASIX 功能描述:USB to Fast Ethernet/HomePNA Controller |
| AX88172 | 制造商:ASI 制造商全稱:ASI 功能描述:USB2.0 TO ETHERNET Device setup guide |
| AX88172A | 制造商:ASIX 制造商全稱:ASIX 功能描述:USB 2.0 to 10/100M Fast Ethernet Controller |
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