參數(shù)資料
型號(hào): ATXMEGA256A3B-AU
廠商: Atmel
文件頁(yè)數(shù): 202/287頁(yè)
文件大?。?/td> 0K
描述: MCU AVR 256KB FLASH 64TQFP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
AVR XMEGA USB Connectivity
標(biāo)準(zhǔn)包裝: 90
系列: AVR® XMEGA
核心處理器: AVR
芯體尺寸: 8/16-位
速度: 32MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 49
程序存儲(chǔ)器容量: 256KB(128K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.6 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b; D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 托盤
配用: ATSTK600-RC14-ND - STK600 SOCKET/ADAPTER 64TQFP
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PIC18F46J11 FAMILY
DS39932D-page 380
2011 Microchip Technology Inc.
25.1
CTMU Operation
The CTMU works by using a fixed current source to
charge a circuit. The type of circuit depends on the type
of measurement being made. In the case of charge
measurement, the current is fixed, and the amount of
time the current is applied to the circuit is fixed. The
amount of voltage read by the A/D is then a measure-
ment of the capacitance of the circuit. In the case of
time measurement, the current, as well as the capaci-
tance of the circuit, is fixed. In this case, the voltage
read by the A/D is then representative of the amount of
time elapsed from the time the current source starts
and stops charging the circuit.
If the CTMU is being used as a time delay, both
capacitance and current source are fixed, as well as the
voltage supplied to the comparator circuit. The delay of
a signal is determined by the amount of time it takes the
voltage to charge to the comparator threshold voltage.
25.1.1
THEORY OF OPERATION
The operation of the CTMU is based on the equation
for charge:
More simply, the amount of charge measured in
coulombs in a circuit is defined as current in amperes
(I) multiplied by the amount of time in seconds that the
current flows (t). Charge is also defined as the
capacitance in farads (C) multiplied by the voltage of
the circuit (V). It follows that:
The CTMU module provides a constant, known current
source. The A/D Converter is used to measure (V) in
the equation, leaving two unknowns: capacitance (C)
and time (t). The above equation can be used to calcu-
late capacitance or time, by either the relationship
using the known fixed capacitance of the circuit:
or by:
using a fixed time that the current source is applied to
the circuit.
25.1.2
CURRENT SOURCE
At the heart of the CTMU is a precision current source,
designed to provide a constant reference for measure-
ments. The level of current is user-selectable across
three ranges or a total of two orders of magnitude, with
the ability to trim the output in ±2% increments
(nominal). The current range is selected by the
IRNG<1:0> bits (CTMUICON<1:0>), with a value of
‘01’ representing the lowest range.
Current trim is provided by the ITRIM<5:0> bits
(CTMUICON<7:2>). These six bits allow trimming of
the current source in steps of approximately 2% per
step. Note that half of the range adjusts the current
source positively and the other half reduces the current
source. A value of ‘000000’ is the neutral position (no
change). A value of ‘100001’ is the maximum negative
adjustment (approximately -62%) and ‘011111’ is the
maximum positive adjustment (approximately +62%).
25.1.3
EDGE SELECTION AND CONTROL
CTMU measurements are controlled by edge events
occurring on the module’s two input channels. Each
channel, referred to as Edge 1 and Edge 2, can be con-
figured to receive input pulses from one of the edge
input pins (CTED1 and CTED2) or ECCPx Special
Event Triggers. The input channels are level-sensitive,
responding to the instantaneous level on the channel
rather than a transition between levels. The inputs are
selected using the EDG1SEL and EDG2SEL bit pairs
(CTMUCONL<3:2 and 6:5>).
In addition to source, each channel can be configured for
event polarity using the EDGE2POL and EDGE1POL
bits (CTMUCONL<7,4>). The input channels can also
be filtered for an edge event sequence (Edge 1 occur-
ring before Edge 2) by setting the EDGSEQEN bit
(CTMUCONH<2>).
25.1.4
EDGE STATUS
The CTMUCONL register also contains two status bits:
EDG2STAT and EDG1STAT (CTMUCONL<1:0>).
Their primary function is to show if an edge response
has occurred on the corresponding channel. The
CTMU automatically sets a particular bit when an edge
response is detected on its channel. The level-sensitive
nature of the input channels also means that the status
bits become set immediately if the channel’s configura-
tion is changed and is the same as the channel’s
current state.
The module uses the edge status bits to control the cur-
rent source output to external analog modules (such as
the A/D Converter). Current is only supplied to external
modules when only one (but not both) of the status bits
is set, and shuts current off when both bits are either
set or cleared. This allows the CTMU to measure cur-
rent only during the interval between edges. After both
status bits are set, it is necessary to clear them before
another measurement is taken. Both bits should be
cleared simultaneously, if possible, to avoid re-enabling
the CTMU current source.
In addition to being set by the CTMU hardware, the
edge status bits can also be set by software. This is
also the user’s application to manually enable or
disable the current source. Setting either one (but not
both) of the bits enables the current source. Setting or
clearing both bits at once disables the source.
IC
dV
dT
-------
=
It
CV.
=
tC V
I
=
CI t
V
=
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