參數(shù)資料
型號: ATWEBDVK-02WC
廠商: Atmel
文件頁數(shù): 125/137頁
文件大?。?/td> 0K
描述: KIT DEV TCP/IP AT89C51RD2 WEBCAM
標(biāo)準(zhǔn)包裝: 1
系列: @Web
主要目的: *
嵌入式: *
已用 IC / 零件: AT89C51RD2
主要屬性: *
次要屬性: *
已供物品: 板,帶網(wǎng)絡(luò) Webcam 模塊和軟件
產(chǎn)品目錄頁面: 617 (CN2011-ZH PDF)
88
4235K–8051–05/08
AT89C51RD2/ED2
22. Reduced EMI Mode
The ALE signal is used to demultiplex address and data buses on port 0 when used with exter-
nal program or data memory. Nevertheless, during internal code execution, ALE signal is still
generated. In order to reduce EMI, ALE signal can be disabled by setting AO bit.
The AO bit is located in AUXR register at bit location 0. As soon as AO is set, ALE is no longer
output but remains active during MOVX and MOVC instructions and external fetches. During
ALE disabling, ALE pin is weakly pulled high.
Table 22-1.
AUXR Register
AUXR - Auxiliary Register (8Eh)
Reset Value = XX00 10’HSB. XRAM’0b
Not bit addressable
7
6
5
4
3
2
1
0
DPU
-
M0
XRS2
XRS1
XRS0
EXTRAM
AO
Bit
Number
Bit
Mnemonic
Description
7
DPU
Disable Weak Pull-up
Cleared by software to activate the permanent weak pull-up (default)
Set by software to disable the weak pull-up (reduce power consumption)
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
M0
Pulse length
Cleared to stretch MOVX control: the RD and the WR pulse length is 6 clock periods
(default).
Set to stretch MOVX control: the RD and the WR pulse length is 30 clock periods.
4
XRS2
XRAM Size
XRS2 XRS1XRS0XRAM size
0
0256 bytes
0
1512 bytes
0
1
0768 bytes(default)
0
1
11024 bytes
1
0
01792 bytes
3
XRS1
2
XRS0
1
EXTRAM
EXTRAM bit
Cleared to access internal XRAM using MOVX @ Ri/ @ DPTR.
Set to access external memory.
Programmed by hardware after Power-up regarding Hardware Security Byte (HSB),
default setting, XRAM selected.
0
AO
ALE Output bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if X2
mode is used) (default). Set, ALE is active only during a MOVX or MOVC instruction is
used.
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