參數(shù)資料
型號(hào): ATSAM3X8CA-CU
廠商: Atmel
文件頁數(shù): 57/71頁
文件大小: 0K
描述: IC MCU 2X256KB CORTEX-M3 100-BGA
標(biāo)準(zhǔn)包裝: 260
系列: SAM3X
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 84MHz
連通性: CAN,以太網(wǎng),I²C,IrDA,LIN,MMC,SPI,SSC,UART/USART,USB
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 63
程序存儲(chǔ)器容量: 512KB(512K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 96K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TFBGA
包裝: 托盤
62
11057BS–ATARM–13-Jul-12
SAM3X/A
62
11057BS–ATARM–13-Jul-12
SAM3X/A
12.7
Pulse Width Modulation Controller (PWM)
One Eight-channel (SAM3A and 144-pin SAM3X) or One Four-channel (100-pin SAM3X) 16-
bit PWM Controller, 16-bit counter per channel
Common clock generator, providing Thirteen Different Clocks
– A Modulo n counter providing eleven clocks
– Two independent Linear Dividers working on modulo n counter outputs
– High Frequency Asynchronous clocking mode
Independent channel programming
– Independent Enable Disable Commands
– Independent Clock Selection
– Independent Period and Duty Cycle, with Double Bufferization
– Programmable selection of the output waveform polarity
– Programmable center or left aligned output waveform
– Independent Output Override for each channel
– Independent complementary Outputs with 12-bit dead time generator for each
channel
– Independent Enable Disable Commands
– Independent Clock Selection
– Independent Period and Duty Cycle, with Double Bufferization
Synchronous Channel mode
– Synchronous Channels share the same counter
– Mode to update the synchronous channels registers after a programmable number
of periods
Interfaced with Peripheral DMA (PDC) or with the DMA Controller (DMAC) Channels to
Reduce Processor Overhead
Two independent event lines which can send up to 4 triggers on ADC within a period
Three programmable external (PWMFIx pins) and three internal (from ADC, PMC controller
and Timer 0) Fault Inputs providing an asynchronous protection of outputs without MCU
intervention
Stepper motor control (2 Channels)
12.8
High Speed Multimedia Card Interface (HSMCI)
Compatibility with MultiMedia Card Specification Version 4.3
Compatibility with SD Memory Card Specification Version 2.0
Compatibility with SDIO Specification Version V2.0
Compatibility with CE-ATA Specification 1.1
Cards clock rate up to Master Clock divided by 2
Boot Operation Mode support
High Speed mode support
Embedded power management to slow down clock rate when not used
Supports 2 Multiplexed Slot(s)
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