- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄295113 > ATR0621N-7FQY (ATMEL CORP) TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA100 PDF資料下載
參數(shù)資料
| 型號： | ATR0621N-7FQY |
| 廠商： | ATMEL CORP |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA100 |
| 封裝： | 9 X 9 MM, 0.80 MM PITCH, ROHS COMPLIANT, LFBGA-100 |
| 文件頁數(shù)： | 31/31頁 |
| 文件大?。?/td> | 477K |
| 代理商： | ATR0621N-7FQY |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁當(dāng)前第31頁
9
4890C–GPS–10/06
ATR0621
3.2
Signal Description
Table 3-2.
ATR0621 Signal Description
Module
Name
Function
Type
Active Level Comment
EBI
EM_A0 to EM_A21
External memory address bus
Output
–
All valid after reset
EM_DA0 to EM_DA15 External memory data bus
I/O
–
Internal pull-down resistor
NCS0 to NCS1
Chip select
Output
Low
Output high in RESET state
NCS2 to NCS3
Chip select
Output
Low
Output high in RESET state
NWR0
Lower byte write signal
Output
Low
Output high in RESET state
NWR1
Upper byte write signal
Output
Low
Output high in RESET state
NRD
Read signal
Output
Low
Output high in RESET state
NWE
Write enable
Output
Low
Output high in RESET state
NOE
Output enable
Output
Low
Output high in RESET state
NUB
Upper byte select (16-bit SRAM)
Output
Low
Output high in RESET state
NLB
Lower byte select (16-bit SRAM)
Output
Low
Output high in RESET state
BOOT_MODE
Boot mode input
Input
–
PIO-controlled after reset,
internal pull-down resistor
USART
TXD1-2
Transmit data output
Output
–
PIO-controlled after reset
RXD1-2
Receive data input
Input
–
PIO-controlled after reset
SCK1-2
External synchronous serial clock
I/O
–
PIO-controlled after reset
USB
USB_DP
USB data (D+)
I/O
–
USB_DM
USB data (D-)
I/O
–
APMC
RF_ON
Output
–
Interface to ATR0601
AIC
EXTINT0-1
External interrupt request
Input
High/
Low/
Edge
PIO-controlled after reset
AGC
AGCOUT0-1
Automatic gain control
Output
–
Interface to ATR0601
PIO-controlled after reset
RTC
NSLEEP
Sleep output
Output
Low
Interface to ATR0601
NSHDN
Shutdown output
Output
Low
Connect to pin LDO_EN
XT_IN
Oscillator input
Input
–
RTC oscillator
XT_OUT
Oscillator output
Output
–
RTC oscillator
SPI
SCK
SPI clock
I/O
–
PIO-controlled after reset
MOSI
Master out slave in
I/O
–
PIO-controlled after reset
MISO
Master in slave out
I/O
–
PIO-controlled after reset
NSS/NPCS0
Slave select
I/O
Low
PIO-controlled after reset
NPCS1-3
Slave select
Output
Low
PIO-controlled after reset
WD
NWD_OVF
Watchdog timer overflow
Output
–
PIO-controlled after reset
PIO
P0-31
Programmable I/O port
I/O
–
Input after reset
(except P3 to P7, P10, P11, P28)
Note:
1. The USB transceiver is disabled if VDD_USB < 2.0V. In this case the pins USB_DM and USB_DP are connected to GND
(internal pull-down resistors). The USB transceiver is enabled if VDD_USB is within 3.0V and 3.6V.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ATR0621P1-7FQY | TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA100 |
| ATR2805SF/CH | 1-OUTPUT 25 W DC-DC REG PWR SUPPLY MODULE |
| ATS650LSH-I2 | SPECIALTY ANALOG CIRCUIT |
| ATT-0293-83-SMA-02 | 0 MHz - 4000 MHz RF/MICROWAVE FIXED ATTENUATOR |
| ATT-0640-10-29M-02 | 0 MHz - 40000 MHz RF/MICROWAVE FIXED ATTENUATOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ATR0621P_08 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:GPS Baseband GPS Baseband |
| ATR0621P1 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:GPS Baseband Processor |
| ATR0621P1-7FHW | 制造商:Atmel Corporation 功能描述: |
| ATR0621P1-7FQY | 制造商:Atmel Corporation 功能描述: |
| ATR0621P-7FHW | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:GPS Baseband GPS Baseband |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。