
10
4890C–GPS–10/06
ATR0621
GPS
SIGHI0
Digital IF
Input
–
Interface to ATR0601
SIGLO0
Digital IF
Input
–
Interface to ATR0601
SIGHI1
Digital IF
Input
–
PIO-controlled after reset
SIGLO1
Digital IF
Input
–
PIO-controlled after reset
TIMEPULSE
GPS synchronized time pulse
Output
–
PIO-controlled after reset
CONFIG
GPSMODE0-12
GPS mode
Input
–
PIO-controlled after reset
STATUSLED
Status LED
Output
–
PIO-controlled after reset
NEEPROM
Enable EEPROM support
Input
Low
PIO-controlled after reset
ANTON
Active antenna power on output
Output
–
PIO-controlled after reset
NANTSHORT
Active antenna short circuit
detection Input
Input
Low
PIO-controlled after reset
NAADET0-1
Active antenna detection input
Input
Low
PIO-controlled after reset
JTAG/ICE
TMS
Test mode select
Input
–
Internal pull-up resistor
TDI
Test data in
Input
–
Internal pull-up resistor
TDO
Test data out
Output
–
Output high in RESET state
TCK
Test clock
Input
–
Internal pull-up resistor
NTRST
Test reset input
Input
Low
Internal pull-down resistor
DBG_EN
Debug enable
Input
High
Internal pull-down resistor
CLOCK
CLK23
Clock input
Input
–
Interface to ATR0601, Schmitt
trigger input
MCLK_OUT
Master clock output
Output
–
PIO-controlled after reset
RESET
NRESET
Reset input
I/O
Low
Open drain with internal pull-up
resistor
POWER
VDD18
Power
–
Core voltage 1.8V
VDDIO
Power
–
Variable I/O voltage 1.65V to 3.6V
VDD_USB
Power
–
USB voltage 0 to 2.0V or
3.0Vto 3.6V
(1)
GND
Power
–
Ground
LDOBAT
LDOBAT_IN
Power
–
2.3V to 3.6V
VBAT
Power
–
1.5V to 3.6V
VBAT18
Out
–
1.8V backup voltage
LDO18
LDO_IN
LDO in
Power
–
2.3V to 3.6V
LDO_OUT
LDO out
Power
–
1.8V core voltage, maximum
80 mA
LDO_EN
LDO enable
Input
–
Table 3-2.
ATR0621 Signal Description (Continued)
Module
Name
Function
Type
Active Level Comment
Note:
1. The USB transceiver is disabled if VDD_USB < 2.0V. In this case the pins USB_DM and USB_DP are connected to GND
(internal pull-down resistors). The USB transceiver is enabled if VDD_USB is within 3.0V and 3.6V.