
2005 Microchip Technology Inc.
Preliminary
DS41265A-page 197
PIC16F946
FIGURE 16-4:
TIME-OUT SEQUENCE ON POWER-UP (DELAYED MCLR): CASE 1
FIGURE 16-5:
TIME-OUT SEQUENCE ON POWER-UP (DELAYED MCLR): CASE 2
FIGURE 16-6:
TIME-OUT SEQUENCE ON POWER-UP (MCLR WITH VDD): CASE 3
TPWRT
TOST
VDD
MCLR
Internal POR
PWRT Time-out
OST Time-out
Internal Reset
VDD
MCLR
Internal POR
PWRT Time-out
OST Time-out
Internal Reset
TPWRT
TOST
TPWRT
TOST
VDD
MCLR
Internal POR
PWRT Time-out
OST Time-out
Internal Reset