參數(shù)資料
型號: ATMEGA1284-MUR
廠商: Atmel
文件頁數(shù): 139/160頁
文件大?。?/td> 0K
描述: IC MCU AVR 128K FLASH 44QFN
產(chǎn)品培訓(xùn)模塊: megaAVR Introduction
標(biāo)準(zhǔn)包裝: 1
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 128KB(64K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VFQFN 裸露焊盤
包裝: 剪切帶 (CT)
其它名稱: ATMEGA1284-MURCT
8
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port C also serves the functions of the JTAG interface, along with special features of the Atmel
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P as listed on page 85.
2.3.6
Port D (PD7:PD0)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port D output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Po rt
D
al so
ser v e s
t h e
f u nct i o n s
o f
va ri ou s
sp eci a l
f e at u r e s
of
t h e
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P as listed on page 88.
2.3.7
RESET
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in ”” on page 337.
Shorter pulses are not guaranteed to generate a reset.
2.3.8
XTAL1
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
2.3.9
XTAL2
Output from the inverting Oscillator amplifier.
2.3.10
AVCC
AVCC is the supply voltage pin for Port A and the Analog-to-digital Converter. It should be exter-
nally connected to V
CC, even if the ADC is not used. If the ADC is used, it should be connected
to V
CC through a low-pass filter.
2.3.11
AREF
This is the analog reference pin for the Analog-to-digital Converter.
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