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參數(shù)資料
| 型號： | ATF2500C-15JU |
| 廠商： | Atmel |
| 文件頁數(shù)： | 12/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CPLD EE 15NS 44PLCC |
| 標準包裝： | 27 |
| 系列： | ATF2500C(L) |
| 可編程類型： | 系統(tǒng)內(nèi)可編程 |
| 最大延遲時間 tpd(1)： | 15.0ns |
| 電壓電源 - 內(nèi)部： | 4.5 V ~ 5.5 V |
| 宏單元數(shù)： | 24 |
| 輸入/輸出數(shù)： | 24 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 608 (CN2011-ZH PDF) |
2
0777K–PLD–1/24/08
ATF2500C
The ATF2500C is organized around a single universal array. All pins and feedback terms are
always available to every macrocell. Each of the 38 logic pins are array inputs, as are the out-
puts of each flip-flop.
In the ATF2500C, four product terms are input to each sum term. Furthermore, each macrocell’s
three sum terms can be combined to provide up to 12 product terms per sum term with no per-
formance penalty. Each flip-flop is individually selectable to be either D- or T-type, providing
further logic compaction. Also, 24 of the flip-flops may be bypassed to provide internal combina-
torial feedback to the logic array.
Product terms provide individual clocks and asynchronous resets for each flip-flop. The flip-flops
may also be individually configured to have direct input pin clocking. Each output has its own
enable product term. Eight synchronous preset product terms serve local groups of either four or
eight flip-flops. Register preload functions are provided to simplify testing. All registers automati-
cally reset upon power-up.
2.
Pin Configurations
Table 2-1.
Pin Configurations
Pin Name
Function
IN
Logic Inputs
CLK/IN
Pin Clock and Input
I/O
Bi-directional Buffers
I/O 0,2,4...
Even I/O Buffers
I/O 1,3,5...
Odd I/O Buffers
GND
Ground
VCC
+5V Supply
Figure 2-1.
DIP
Figure 2-2.
PLCC
Note:
(PLCC package) pin 4 and pin 26 GND connections are
not required, but are recommended for improved noise
immunity.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
CLK/IN
IN
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
VCC
I/O17
I/O16
I/O15
I/O14
I/O13
I/O12
IN
I/O6
I/O7
I/O8
I/O9
I/O10
I/O11
GND
I/O23
I/O22
I/O21
I/O20
I/O19
I/O18
IN
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
I/O2
I/O3
I/O4
I/O5
VCC
I/O17
I/O16
I/O15
I/O14
I/O13
I/O7
I/O8
I/O9
I/O10
I/O11
GND
I/O23
I/O22
I/O21
I/O20
6
5
4
3
2
1
44
43
42
41
40
18
19
20
21
22
23
24
25
26
27
28
I/O12
IN
GND
I/O18
I/O19
I/O1
I/O0
GND
IN
CLK/IN
IN
I/O6
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| ATF2500C-15JU SL383 | 制造商:Atmel Corporation 功能描述:ATF2500C 1.5K GATES 24 MC IND EEPROM 5V 44 PLCC - Tape and Reel |
| ATF2500C-20GM | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 2500 Gates 5.0V CPLD RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ATF2500C-20JC | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 2500 GATE 24 MACRO STD PWR 5V-20NS RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ATF2500C-20JI | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 2500 GATE 24 MACRO STD PWR 5V-20NS RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ATF2500C-20KM | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 STD PWR 2500 GATE 24 MACROCELL 5V RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
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