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參數(shù)資料
| 型號： | ATF1500ABV-15JI |
| 廠商： | Atmel |
| 文件頁數(shù)： | 15/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CPLD 15NS LOW VOLT PLCC |
| 標準包裝： | 27 |
| 系列： | ATF15xx |
| 可編程類型： | 系統(tǒng)內可編程（最少 10,000 次編程/擦除循環(huán)） |
| 最大延遲時間 tpd(1)： | 15.0ns |
| 電壓電源 - 內部： | 3 V ~ 5.25 V |
| 宏單元數(shù)： | 32 |
| 輸入/輸出數(shù)： | 32 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應商設備封裝： | 44-PLCC |
| 包裝： | 管件 |
| 其它名稱： | ATF1500ABV15JI |
6
0723K–PLD–6/05
ATF1500ABV
9.
ATF1500ABV Macrocell
10. ATF1500ABV Macrocell
The ATF1500ABV macrocell is flexible enough to support highly complex logic functions operat-
ing at high speed. The macrocell consists of five sections: product terms and product term select
multiplexer; OR/XOR/CASCADE logic; a flip-flop; output select and enable; and logic array
inputs.
10.1
Product Terms and Select Mux
Each ATF1500ABV macrocell has five product terms. Each product term receives as its inputs
all signals from both the global bus and regional bus.
The product term select multiplexer (PTMUX) allocates the five product terms as needed to the
macrocell logic gates and control signals. The PTMUX programming is determined by the design
compiler, which selects the optimum macrocell configuration.
10.2
OR/XOR/CASCADE Logic
The ATF1500ABV macrocell’s OR/XOR/CASCADE logic structure is designed to efficiently sup-
port all types of logic. Within a single macrocell, all the product terms can be routed to the OR
gate, creating a five-input AND/OR sum term. With the addition of the CASIN from neighboring
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| ATF1500ABVL | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:High- Performance EE PLD |
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| ATF1500ABVL-25JC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:High- Performance EE PLD |
| ATF1500AL | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:High Performance E2 PLD |
| ATF1500AL-20AC | 功能描述:CPLD - 復雜可編程邏輯器件 CPLD 32 MACROCELL LOW-PWR 5V-20NS RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
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