參數(shù)資料
型號(hào): ATA5744N-TKSY
廠商: ATMEL CORP
元件分類(lèi): 通信及網(wǎng)絡(luò)
英文描述: SPECIALTY TELECOM CIRCUIT, PDSO20
封裝: LEAD FREE, SSO-20
文件頁(yè)數(shù): 3/20頁(yè)
文件大?。?/td> 316K
代理商: ATA5744N-TKSY
11
4893A–RKE–11/05
ATA5744
6.
Digital Signal Processing
The data from the ASK demodulator (Dem_out) is digitally processed in different ways and as a
result converted into the output signal DATA. This processing depends on the selected baudrate
range (BR_Range). Figure 6-1 on page 11 illustrates how Dem_out is synchronized by the
extended basic clock cycle T
XClk. Data can change its state only after TXClk has elapsed. The
edge-to-edge time period tee_sig of the DATA signal as a result is always an integral multiple of
T
XClk.
The minimum time period between two edges of the data signal is limited to tee_sig
≥ T
DATA_min.
This implies an efficient suppression of spikes at the DATA output. At the same time it limits the
maximum frequency of edges at DATA. This eases the interrupt handling of a connected
microcontroller.
Figure 6-1.
Synchronization of the Demodulator Output
Figure 6-2.
Debouncing of the Demodulator Output
Data_out (DATA)
T
XClk
Dem_out
t
ee_sig
DATA
Dem_out
t
ee
t
ee
t
DATA_min
t
ee
t
DATA_min
t
DATA_min
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