參數(shù)資料
型號： ATA5728P6-TKQY
廠商： ATMEL CORP
元件分類： 通信及網(wǎng)絡(luò)
英文描述： SPECIALTY TELECOM CIRCUIT, PDSO20
封裝： SSOP-20
文件頁數(shù)： 6/46頁
文件大?。?/td> 776K
代理商： ATA5728P6-TKQY
14
9106E–RKE–07/08
ATA5723/ATA5724/ATA5728
For best noise immunity using a low span between T
Lim_min and TLim_max is recommended. This is
achieved using a fixed frequency at a 50% duty cycle for the transmitter preburst. A “11111...” or
a “10101...” sequence in Manchester or Bi-phase is suitable for this. A good compromise
between receiver sensitivity and susceptibility to noise is a time window of ±30% regarding the
expected edge-to-edge time t
ee. Using pre-burst patterns that contain various edge-to-edge time
periods, the bit-check limits must be programmed according to the required span.
The bit-check limits are determined by means of the formula below.
T
Lim_min = Lim_min × TXClk
T
Lim_max = (Lim_max – 1) × TXClk
Lim_min and Lim_max are defined by a 5-bit word each within the LIMIT register.
Using above formulas, Lim_min and Lim_max can be determined according to the required
T
Lim_min, TLim_max and TXClk. The time resolution defining TLim_min and TLim_max is TXClk. The mini-
mum edge-to-edge time t
ee (tDATA_L_min, tDATA_H_min) is defined according to the Section 8.6
“Digital Signal Processing” on page 16. The lower limit should be set to Lim_min
≥ 10. The max-
imum value of the upper limit is Lim_max = 63.
If the calculated value for Lim_min is < 19, it is recommended to check 6 or 9 bits (N
Bit-check) to
prevent switching to receiving mode due to noise.
Figure 8-4, Figure 8-5, and Figure 8-6 illustrate the bit check for the bit-check limits
Lim_min = 14 and Lim_max = 24. When the IC is enabled, the signal processing circuits are
enabled during T
Startup. The output of the ASK/FSK demodulator (Dem_out) is undefined during
that period. When the bit check becomes active, the bit-check counter is clocked with the cycle
T
XClk.
Figure 8-4 shows how the bit check proceeds if the bit-check counter value CV_Lim is within the
limits defined by Lim_min and Lim_max at the occurrence of a signal edge. In Figure 8-5 the bit
check fails as the value CV_Lim is lower than the limit Lim_min. The bit check also fails if
CV_Lim reaches Lim_max. This is illustrated in Figure 8-6.
Figure 8-4.
Timing Diagram During Bit Check
IC_ACTIVE
Bit-check
counter
Dem_out
Bit check
T
Bit-check
Start-up mode
(Lim_min = 14, Lim_max = 24)
Bit check ok
78
56
3 4
12
34
15
13 14
11 12
910
12
78
56
3 4
17 18
15 16
13 14
11 12
910
12
78
56
34
12
0
1/2 Bit
Bit-check mode
T
Start-up
T
XClk
相關(guān)PDF資料
PDF描述
ATC-1 Automotive Fuse; Current Rating:1A; Voltage Rating:32V; Fuse Type:Fast Acting; Body Material:Plastic; Fuse Terminals:Blade; Length:12.54mm; Series:ATC; Voltage Rating:32V; Fuse Size/Group:12.54 x 19.14 x 5.12mm RoHS Compliant: Yes
ATC-4 Automotive Fuse; Current Rating:4A; Voltage Rating:32V; Fuse Type:Fast Acting; Body Material:Plastic; Color:Pink; Fuse Terminals:Blade; Length:12.54mm; Series:ATC; Voltage Rating:32V; Fuse Size/Group:12.54 x 19.14 x 5.12mm RoHS Compliant: Yes
ATC-40 Automotive Fuse; Current Rating:40A; Voltage Rating:32V; Fuse Type:Fast Acting; Body Material:Plastic; Color:Orange; Fuse Terminals:Blade; Length:12.54mm; Series:ATC; Voltage Rating:32V; Fuse Size/Group:12.54 x 19.14 x 5.12mm RoHS Compliant: Yes
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