參數(shù)資料
型號(hào): 97SD3248RPMI
廠商: MAXWELL TECHNOLOGIES
元件分類: DRAM
英文描述: 32M X 48 SYNCHRONOUS DRAM, 6 ns, QFP132
封裝: STACK, QFP-132
文件頁(yè)數(shù): 17/40頁(yè)
文件大?。?/td> 758K
代理商: 97SD3248RPMI
97SD3248
M
em
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ry
24
All data sheets are subject to change without notice
2004 Maxwell Technologies
All rights reserved.
1.5Gb (8-Meg X 48-Bit X 4-Banks) SDRAM
03.25.04 Rev 1
Write with auto-precharge: In this operation, since precharge is automatically preformed after completing a
burst write or single write operation, a precharge command need not be executed after each write operation.
The command executed for the same bank after the execution of this command must be the bank active
(ACTV) command. In addition, an interval of I
APW is required between the final valid data input and input of
next command.
Burst Write (Burst Length = 4)
Single Write
相關(guān)PDF資料
PDF描述
97SD3248RPMK 32M X 48 SYNCHRONOUS DRAM, 6 ns, QFP132
97U870AKIT 97U SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC40
97U870AH 97U SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52
97U870AHIT 97U SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52
97U870AKT 97U SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC40
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