參數(shù)資料
型號: AT91SAM7S256C-MU
廠商: Atmel
文件頁數(shù): 12/165頁
文件大?。?/td> 0K
描述: IC ARM7 MCU 32BIT 256K 64QFN
標準包裝: 260
系列: SAM7S
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 55MHz
連通性: I²C,SPI,SSC,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 256KB(256K x 8)
程序存儲器類型: 閃存
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-VFQFN 裸露焊盤
包裝: 托盤
109
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
19.2.3
Write Operations
The internal memory area reserved for the embedded Flash can also be written through a write-only latch buffer.
Write operations take into account only the 8 lowest address bits and thus wrap around within the internal memory
area address space and appear to be repeated 1024 times within it.
Write operations can be prevented by programming the Memory Protection Unit of the product.
Writing 8-bit and 16-bit data is not allowed and may lead to unpredictable data corruption.
Write operations are performed in the number of wait states equal to the number of wait states for read operations
+ 1, except for FWS = 3 (see “MC Flash Mode Register” on page 115).
19.2.4
Flash Commands
The EFC offers a command set to manage programming the memory flash, locking and unlocking lock sectors,
consecutive programming and locking, and full Flash erasing.
To run one of these commands, the field FCMD of the MC_FCR register has to be written with the command num-
ber. As soon as the MC_FCR register is written, the FRDY flag is automatically cleared. Once the current
command is achieved, then the FRDY flag is automatically set. If an interrupt has been enabled by setting the bit
FRDY in MC_FMR, the interrupt line of the Memory Controller is activated.
All the commands are protected by the same keyword, which has to be written in the eight highest bits of the
MC_FCR register.
Writing MC_FCR with data that does not contain the correct key and/or with an invalid command has no effect on
the memory plane; however, the PROGE flag is set in the MC_FSR register. This flag is automatically cleared by a
read access to the MC_FSR register.
When the current command writes or erases a page in a locked region, the command has no effect on the whole
memory plane; however, the LOCKE flag is set in the MC_FSR register. This flag is automatically cleared by a read
access to the MC_FSR register.
Table 19-2.
Set of Commands
Command
Value
Mnemonic
Write page
0x01
WP
Set Lock Bit
0x02
SLB
Write Page and Lock
0x03
WPL
Clear Lock Bit
0x04
CLB
Erase all
0x08
EA
Set General-purpose NVM Bit
0x0B
SGPB
Clear General-purpose NVM Bit
0x0D
CGPB
Set Security Bit
0x0F
SSB
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