參數(shù)資料
型號: AT89C5131A-PUTIM
廠商: Atmel
文件頁數(shù): 174/176頁
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 32K USB 32QFN
標準包裝: 260
系列: AT89C513x
核心處理器: C52X2
芯體尺寸: 8-位
速度: 48MHz
連通性: I²C,SPI,UART/USART,USB
外圍設(shè)備: LED,POR,PWM,WDT
輸入/輸出數(shù): 18
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 1.25K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 32-VQFN 裸露焊盤
包裝: 托盤
配用: AT89STK-10-ND - KIT EVAL APPL MASS STORAGE
AT89STK-05-ND - KIT STARTER FOR AT89C5131
96
AT89C5131
4136C–USB–04/05
Reset Value = 0001 0100b
Not bit addressable
Serial Peripheral Status Register
(SPSTA)
The Serial Peripheral Status Register contains flags to signal the following conditions:
Data transfer complete
Write collision
Inconsistent logic level on SS pin (mode fault error)
Table 76 describes the SPSTA register and explains the use of every bit in the register.
Table 76. SPSTA Register
SPSTA - Serial Peripheral Status and Control register (0C4H)
2SPR1
SPR2
SPR1
SPR0
Serial Peripheral Rate
0
Invalid
00
1
F
CLK PERIPH/4
01
0
F
CLK PERIPH/8
01
1
F
CLK PERIPH/16
10
0
F
CLK PERIPH/32
10
1
F
CLK PERIPH/64
11
0
F
CLK PERIPH/128
1
Invalid
1SPR0
Bit
Number
Bit Mnemonic
Description
7654
3210
SPIF
WCOL
SSERR
MODF
----
Bit
Number
Bit
Mnemonic Description
7SPIF
Serial Peripheral data transfer flag
Cleared by hardware to indicate data transfer is in progress or has been
approved by a clearing sequence.
Set by hardware to indicate that the data transfer has been completed.
6WCOL
Write Collision flag
Cleared by hardware to indicate that no collision has occurred or has been
approved by a clearing sequence.
Set by hardware to indicate that a collision has been detected.
5SSERR
Synchronous Serial Slave Error flag
Set by hardware when SS is de-
asserted before the end of a received data.
Cleared by disabling the SPI (clearing SPEN bit in SPCON).
4MODF
Mode Fault
Cleared by hardware to indicate that the SS pin is at appropriate logic level, or
has been approved by a clearing sequence.
Set by hardware to indicate that the SS pin is at inappropriate logic level.
3-
Reserved
The value read from this bit is indeterminate. Do not set this bit
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