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參數(shù)資料
| 型號： | AT43USB326-AU |
| 廠商： | Atmel Corp. |
| 英文描述： | Multimedia USB Keyboard Controller with Embedded Hub |
| 中文描述： | 多媒體USB鍵盤控制器的嵌入式集線器 |
| 文件頁數(shù)： | 24/102頁 |
| 文件大?。?/td> | 511K |
| 代理商： | AT43USB326-AU |
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24
AT43USB326
3313D–USB–04/06
General Interrupt Mask Register – GIMSK
Bit 7 – Res: Reserved Bit
Bit 6 – INT0: Interrupt Request 0 (Suspend/Resume Interrupt) Enable
When the INT0 bit is set (one) and the I-bit in the Status Register (SREG) is set (one), the
external pin interrupt is enabled. The Interrupt Sense Control0 bits 1/0 (ISC01 and ISC00) in
the MCU general Control Register (MCUCR) defines whether the external interrupt is acti-
vated on rising or falling edge of the INT0 pin or level sensed. Activity on the pin will cause an
interrupt request even if INT0 is configured as an output. The corresponding interrupt of Inter-
rupt Request 0 is executed from program memory address $002. See also “External
Interrupts” on page 26.
Bits 5..0 – Res: Reserved Bits
These bits are reserved bits in the AT43USB326 and always read as zero.
General Interrupt Flag Register – GIFR
Bit 7 – Res: Reserved Bit
Bit 6 – INTF0: Interrupt Flag0 (Suspend/Resume Interrupt Flag)
When an event on the INT0 (that is, a USB event-related interrupt) triggers an interrupt
request, INTF0 becomes set (one). If the I-bit in SREG and the INT0 bit in GIMSK are set
(one), the MCU will jump to the interrupt vector at address $002. The flag is cleared when the
interrupt routine is executed. Alternatively, the flag can be cleared by writing a logical one to it.
Bits 5..0 – Res: Reserved Bits
These bits are reserved bits in the AT43USB326 and always read as zero.
Bit
7
6
5
4
3
2
1
0
$3B ($5B)
–
INT0
–
–
–
–
–
–
GIMSK
Read/Write
R
R/W
R
R
R
R
R
R
Initial Value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
$3A ($5A)
–
INT F0
–
–
–
–
–
–
GIFR
Read/Write
R
R/W
R
R
R
R
R
R
Initial Value
0
0
0
0
0
0
0
0
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