參數(shù)資料
型號(hào): AT43USB325E-AU
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: Multimedia USB Keyboard Controller with Embedded Hub
中文描述: 8-BIT, 12 MHz, RISC MICROCONTROLLER, PQFP64
封裝: 1.40 MM HEIGHT, GREEN, PLASTIC, MS-026ACB, LQFP-64
文件頁(yè)數(shù): 24/109頁(yè)
文件大?。?/td> 643K
代理商: AT43USB325E-AU
24
3355C–USB–4/05
AT43USB325
– Separated reset: A USB bus reset will only reset the USB hardware, while an
interrupt to the microcontroller will be generated if the BUS INT MSK bit, bit 3 of
SPRSMSK register, is also set.
When the USB hardware is reset, the compound device is de-configured and has to be re-enu-
merated by the host. When the microcontroller is reset, all I/O registers are then set to their initial
values, and the program starts execution from address $000. The instruction placed in address
$000 must be a JMP instruction to the reset handling routine. If the program never enables an
interrupt source, the interrupt vectors are not used, and regular program code can be placed at
these locations. The circuit diagram in
Figure 4-3
shows the reset logic.
Figure 4-3.
Reset Logic
4.6
Power-on Reset
A Power-on Reset (POR) circuit ensures that the device is reset from power-on. An internal
timer clocked from the Watchdog timer oscillator prevents the MCU from starting until after a cer-
tain period after V
CC
has reached the power-on threshold voltage, regardless of the V
CC
rise
time.
If the build-in start-up delay is sufficient, RESET can be connected to V
CC
directly or via an
external pull-up resistor. By holding the pin low for a period after V
CC
has been applied, the
Power-on Reset period can be extended.
FSTRT
Cntr Reset
USB Reset
OR
POR Ckt
Reset Ckt
Watchdog Timer
Divider
14-bit Cntr
VCC
RSTN
1-MHz Clock
S
R
ON
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