
1
Features
Low-voltage and Standard-voltage Operation
– 5.0 (V
CC
= 4.5V to 5.5V)
– 2.7 (V
CC
= 2.7V to 5.5V)
– 1.8 (V
CC
= 1.8V to 3.6V)
Internally Organized 16,384 x 8 and 32,768 x 8
2-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (5V), 400 kHz (2.7V) and 100 kHz (1.8V) Compatibility
Write Protect Pin for Hardware and Software Data Protection
64-byte Page Write Mode (Partial Page Writes Allowed)
Self-timed Write Cycle (5 ms Typical)
High Reliability
–
Endurance: 100,000 Write Cycles
–
Data Retention: 40 Years
–
ESD Protection: > 4000V
Automotive Grade and Extended Temperature Devices Available
8-pin JEDEC PDIP, 8-lead JEDEC and EIAJ SOIC, 14-lead TSSOP, and
8-pad Leadless Array Packages
Description
The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and
programmable read only memory (EEPROM) organized as 16,384/32,768 words of 8
bits each. The device
’
s cascadable feature allows up to four devices to share a com-
mon 2-wire bus. The device is optimized for use in many industrial and commercial
applications where low-power and low-voltage operation are essential. The devices
are available in space-saving 8-pin JEDEC PDIP, 8-lead EIAJ, 8-lead JEDEC SOIC,
14-lead TSSOP, and 8-pad LAP packages. In addition, the entire family is available in
5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 3.6V) versions.
Rev. 0670D
–
10/99
2-wire Serial
EEPROMs
128K (16,384 x 8)
256K (32,768 x 8)
AT24C128
AT24C256
Pin Configurations
Pin Name
Function
A0 - A1
Address Inputs
SDA
Serial Data
SCL
Serial Clock Input
WP
Write Protect
NC
No Connect
8-pin PDIP
1
2
3
4
8
7
6
5
A0
A1
NC
GND
VCC
WP
SCL
SDA
8-lead SOIC
1
2
3
4
8
7
6
5
A0
A1
NC
GND
VCC
WP
SCL
SDA
8-pad Leadless Array
Bottom View
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
NC
GND
14-lead TSSOP
1
2
3
4
5
6
7
14
13
12
11
10
9
8
A0
A1
NC
NC
NC
NC
GND
VCC
WP
NC
NC
NC
SCL
SDA