參數(shù)資料
型號(hào)： AT24C128-10TU-2.7
廠商： ATMEL CORP
元件分類(lèi)： DRAM
英文描述： Two-wire Serial EEPROMs
中文描述： 16K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8
封裝： 4.40 MM, GREEN, PLASTIC, MO-153AA, TSSOP-8
文件頁(yè)數(shù)： 7/23頁(yè)
文件大小： 388K
代理商： AT24C128-10TU-2.7
7
AT24C128/256
0670S–SEEPR–5/06
Device
Operation
CLOCK and DATA TRANSITIONS:
The SDA pin is normally pulled high with an external
device. Data on the SDA pin may change only during SCL low time periods (see Figure 4 on
page 8). Data changes during SCL high periods will indicate a start or stop condition as
defined below.
START CONDITION:
A high-to-low transition of SDA with SCL high is a start condition which
must precede any other command (see Figure 5 on page 9).
STOP CONDITION:
A low-to-high transition of SDA with SCL high is a stop condition. After a
read sequence, the stop command will place the EEPROM in a standby power mode (see Fig-
ure 5 on page 9).
ACKNOWLEDGE:
All addresses and data words are serially transmitted to and from the
EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowl-
edge that it has received each word.
STANDBY MODE:
The AT24C128/256 features a low power standby mode which is enabled:
a) upon power-up and b) after the receipt of the STOP bit and the completion of any internal
operations.
MEMORY RESET:
After an interruption in protocol, power loss or system reset, any two-wire
part can be reset by following these steps: (a) Clock up to 9 cycles, (b) look for SDA high in
each cycle while SCL is high and then (c) create a start condition as SDA is high.
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