參數(shù)資料
型號(hào): AT24C1024C1-10CU-2.7
廠商: ATMEL CORP
元件分類: DRAM
英文描述: Two-wire Serial EEPROM
中文描述: 128K X 8 I2C/2-WIRE SERIAL EEPROM, DSO8
封裝: 8 X 5 MM, 1.04 MM HEIGHT, 1.27 MM PITCH, GREEN, LAP-8
文件頁數(shù): 3/18頁
文件大?。?/td> 389K
代理商: AT24C1024C1-10CU-2.7
3
AT24C1024
1471N–SEEPR–12/05
Pin Description
SERIAL CLOCK (SCL):
The SCL input is used to positive edge clock data into each
EEPROM device and negative edge clock data out of each device.
SERIAL DATA (SDA):
The SDA pin is bi-directional for serial data transfer. This pin is open-
drain driven and may be wire-ORed with any number of other open-drain or open-collector
devices.
DEVICE/ADDRESSES (A1):
The A1 pin is a device address input that can be hardwired or
left not connected for hardware compatibility with other AT24Cxx devices. When the A1 pin is
hardwired, as many as two 1024K devices may be addressed on a single bus system (device
addressing is discussed in detail under the Device Addressing section). If the A1 pin is left
floating, the A1 pin will be internally pulled down to GND if the capacitive coupling to the circuit
board V
CC
plane is <3 pF. If coupling is >3 pF, Atmel recommends connecting the A1 pin to
GND.
WRITE PROTECT (WP):
The write protect input, when connected to GND, allows normal write
operations. When WP is connected high to V
CC
, all write operations to the memory are inhib-
ited. If the pin is left floating, the WP pin will be internally pulled down to GND if the capacitive
coupling to the circuit board V
CC
plane is <3 pF. If coupling is >3 pF, Atmel recommends con-
necting the pin to GND. Switching WP to V
CC
prior to a write operation creates a software
write-protect function.
Memory
Organization
AT24C1024, 1024K SERIAL EEPROM:
The 1024K is internally organized as 512 pages of
256 bytes each. Random word addressing requires a 17-bit data word address.
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