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參數(shù)資料
| 型號： | AT17LV512A |
| 廠商： | Atmel Corp. |
| 元件分類： | FPGA |
| 英文描述： | FPGA Configuration EEPROM Memory |
| 中文描述： | FPGA配置EEPROM存儲器 |
| 文件頁數(shù)： | 1/14頁 |
| 文件大?。?/td> | 242K |
| 代理商： | AT17LV512A |
1
Features
Serial EEPROM Family for Configuring FLEX
Devices
Simple Interface to SRAM FPGAs
EE Programmable 2-Mbit Serial Memories Designed to Store Configuration Programs
for Field Programmable Gate Arrays (FPGAs)
Cascadable Read Back to Support Additional Configurations or Future Higher-density
Arrays
Low-power CMOS EEPROM Process
Programmable Reset Polarity
Available in the Space-efficient Surface-mount PLCC Package
In-System Programmable via 2-wire Bus
Emulation of Atmel’s AT24CXXX Serial EEPROMs
Available in 3.3V ± 5% LV and 5V ± 5% C Versions
System-friendly READY Pin
Replacement for AT17C/LV002A
Description
The AT17C002A and AT17LV002A (high-density AT17A Series) FPGA Configuration
EEPROMs (configurators) provide an easy-to-use, cost-effective configuration mem-
ory for programming Altera FLEX devices. The AT17A Series is packaged in the
popular 20-lead PLCC and the 32-lead TQFP. The AT17A Series family uses a simple
serial-access procedure to configure one or more FPGA devices. The AT17A Series
organization supplies enough memory to configure one or multiple smaller FPGAs.
Using a feature of the AT17A Series, the user can select the polarity of the reset func-
tion by programming internal EEPROM bytes. The AT17A parts generate their own
internal clock and can be used as a system “master” for loading the FPGA devices.
The Atmel devices also support a system-friendly READY pin. The READY pin is used
to simplify system power-up considerations.
The AT17A Series Configurators can be programmed with industry-standard program-
mers or Atmel’s ATDH2200E Programming Kit.
FPGA
Configuration
EEPROM
Memory
2-megabit
Altera Pinout
AT17C002A
AT17LV002A
Rev. 2280B–08/01
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT17C002A-10JI | 5015 RR 19#16 PIN PLUG |
| AT17LV002A | FPGA Configuration EEPROM Memory |
| AT17LV512A-10JC | High Speed CMOS Logic Dual Monostable Multivibrators with Reset 16-SO -55 to 125 |
| AT17LV512A-10JI | FPGA Serial Configuration Memories |
| AT17C002A | FPGA Configuration EEPROM Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT17LV512A-10BJC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV512A-10BJI | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV512A-10CC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV512A-10CI | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration EEPROM Memory |
| AT17LV512A10JC | 制造商:ALTERA 功能描述:New |
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