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參數(shù)資料
| 型號(hào)： | AT17C010 |
| 廠商： | Atmel Corp. |
| 英文描述： | 1M FPGA Configuration EEPROM Memory(1M 現(xiàn)場(chǎng)可編程（FPGA）配置EEPROM存儲(chǔ)器) |
| 中文描述： | 100萬FPGA配置存儲(chǔ)器（100萬現(xiàn)場(chǎng)可編程（FPGA）的配置的EEPROM存儲(chǔ)器） |
| 文件頁(yè)數(shù)： | 3/18頁(yè) |
| 文件大小： | 151K |
| 代理商： | AT17C010 |
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AVR301
3
Figure 2.
I
2
C Start and Stop Bits
The AT17C010 device is programmed/verified on a 128-
byte page boundary. During normal FPGA configuration
operations the read of the device starts at address 0 and
continues until the FPGA has completed its configuration.
The routines WritePage and ReadPage write and read
128-byte pages from the configuration memory and use the
generic I
2
C routines to perform this function. WritePage
and ReadPage are both called with the page address to
write/read to, and a pointer to a 128-byte page buffer. At
the end of a page write the data polling method is used to
determine the end of the internal page programming cycle.
ProgramResetPolarity and VerifyResetPolarity write and
read data from memory locations 0x20000 - 0x20003 in
effect setting and verifying the reset/oe polarity.
PORTB on the AT90S8515 is used to communicate with
the FPGA configuration memory. Bit assignments are as
follows:
/*PB0 = SDA*/
/*PB1 = SCL*/
/*PB2 = SER_EN - used to put AT17C010 in I2C mode*/
/*PB3 = CS*/
/*PB4 = RESET/OE*/
The routine Init.c initializes the AT90S8515 peripherals.
Routines Timer0.c and Timer1.c are general-purpose time
out routines. Main is used to call WritePage, ReadPage,
ProgramResetPolarity, and VerifyResetPolarity and serves
to illustrate proper calling conventions for those routines.
Modifications and Optimizations
Impact on Changing Crystal Frequency
If the user decides to change oscillator frequencies then
the following routines would have to be modified:
BitDelay
ProgramResetPolarity
SetSCLHigh
WritePage
BitDelay uses NOP
’
s to effect a quarter bus period delay.
Add or remove NOP
’
s to increase or decrease the delay.
In the routines ProgramResetPolarity and WritePage timer
1 is used to generate a time-out after 20 milliseconds, the
programming operation should have completed by then.
Timer 0 is used in SetSCLHigh to generate a time out after
35 microseconds. If the SCL line is not high by then, then
something is wrong on the bus.
References
The I
2
C Bus and How to use it, April 1995 Update - Philips
Semiconductors
Programming Specification for Atmel
’
s Configuration Mem-
ory EEPROMS - Atmel Corporation
AT17C512/LV512/010/LV010 FPGA Configuration Memory
Datasheet - Atmel Corporation
AT90S8515 Datasheet - Atmel Corporation
Table 2.
Code Size and Execution Time for Page
Read/Write
Routines
Cycles
Bytes
WritePage
287872
146
ReadPage
145901
126
ProgramResetPolarity
156104
106
VerifyResetPolarity
157269
98
START Condition
SCL
SDA
STOP Condition
SCL
SDA
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| AT17LV512A | FPGA Configuration EEPROM Memory |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT17C010-10 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration E2PROM Memory |
| AT17C010-10CC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configuration EEPROM |
| AT17C010-10CI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configuration EEPROM |
| AT17C010-10JC | 功能描述:FPGA-配置存儲(chǔ)器 1M 15MHz 5V RoHS:否 制造商:Altera Corporation 存儲(chǔ)類型:Flash 存儲(chǔ)容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PLCC-20 |
| AT17C010-10JI | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration E2PROM Memory |
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